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| author | Tom Rini <trini@konsulko.com> | 2024-10-11 12:23:25 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-10-11 12:23:25 -0600 |
| commit | 47e544f576699ca4630e20448db6a05178960697 (patch) | |
| tree | f31951120512ac41f145dc0fcf6b0bbdfe5b9c01 /arch/riscv/lib | |
| parent | 5d899fc58c44fe5623e31524da2205d8597a53d1 (diff) | |
| parent | 0220a68c25cbfdfa495927f83abf0b1d4ebd823b (diff) | |
Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"
Simon Glass <sjg@chromium.org> says:
When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL
Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.
For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.
This series starts a change in terminology and usage to resolve the
above issues:
- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_
It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.
This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.
The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
Diffstat (limited to 'arch/riscv/lib')
| -rw-r--r-- | arch/riscv/lib/Makefile | 24 | ||||
| -rw-r--r-- | arch/riscv/lib/sifive_cache.c | 4 |
2 files changed, 14 insertions, 14 deletions
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index bcfdb516b76..268116f3757 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -11,20 +11,20 @@ obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-$(CONFIG_SIFIVE_CACHE) += sifive_cache.o -ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y) -obj-$(CONFIG_$(SPL_)RISCV_ACLINT) += aclint_ipi.o +ifeq ($(CONFIG_$(XPL_)RISCV_MMODE),y) +obj-$(CONFIG_$(XPL_)RISCV_ACLINT) += aclint_ipi.o obj-$(CONFIG_ANDES_PLICSW) += andes_plicsw.o else obj-$(CONFIG_SBI) += sbi.o obj-$(CONFIG_SBI_IPI) += sbi_ipi.o endif obj-y += interrupts.o -ifeq ($(CONFIG_$(SPL_)SYSRESET),) +ifeq ($(CONFIG_$(XPL_)SYSRESET),) obj-y += reset.o endif obj-y += setjmp.o -obj-$(CONFIG_$(SPL_)SMP) += smp.o -obj-$(CONFIG_SPL_BUILD) += spl.o +obj-$(CONFIG_$(XPL_)SMP) += smp.o +obj-$(CONFIG_XPL_BUILD) += spl.o obj-y += fdt_fixup.o obj-$(CONFIG_$(SPL)CMD_BDI) += bdinfo.o @@ -36,11 +36,11 @@ CFLAGS_REMOVE_$(EFI_CRT0) := $(CFLAGS_NON_EFI) CFLAGS_$(EFI_RELOC) := $(CFLAGS_EFI) CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI) -obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o -obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o -obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o -obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_STRLEN) += strlen_zbb.o -obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_STRCMP) += strcmp_zbb.o -obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_STRNCMP) += strncmp_zbb.o +obj-$(CONFIG_$(PHASE_)USE_ARCH_MEMSET) += memset.o +obj-$(CONFIG_$(PHASE_)USE_ARCH_MEMMOVE) += memmove.o +obj-$(CONFIG_$(PHASE_)USE_ARCH_MEMCPY) += memcpy.o +obj-$(CONFIG_$(PHASE_)USE_ARCH_STRLEN) += strlen_zbb.o +obj-$(CONFIG_$(PHASE_)USE_ARCH_STRCMP) += strcmp_zbb.o +obj-$(CONFIG_$(PHASE_)USE_ARCH_STRNCMP) += strncmp_zbb.o -obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o +obj-$(CONFIG_$(PHASE_)SEMIHOSTING) += semihosting.o diff --git a/arch/riscv/lib/sifive_cache.c b/arch/riscv/lib/sifive_cache.c index d8fe1dfa958..d74544b93d8 100644 --- a/arch/riscv/lib/sifive_cache.c +++ b/arch/riscv/lib/sifive_cache.c @@ -10,7 +10,7 @@ #include <dm/device-internal.h> #include <dm/uclass-internal.h> -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD void enable_caches(void) { struct udevice *dev; @@ -45,4 +45,4 @@ void enable_caches(void) probe_cache_device(DM_DRIVER_GET(sifive_pl2), dev); } -#endif /* !CONFIG_SPL_BUILD */ +#endif /* !CONFIG_XPL_BUILD */ |
