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authorTom Rini <trini@konsulko.com>2023-04-27 19:22:38 -0400
committerTom Rini <trini@konsulko.com>2023-04-27 19:22:38 -0400
commitc9c2c95d4cd27fe0cd41fe13a863899d268f973c (patch)
tree3d21d49d97b97f5c8579a43c5d4211f04d6fa4de /arch/sandbox/cpu/cpu.c
parentb197f1f05dee730e173a0756cb1a5f2be5d3ba5b (diff)
parent56722fafd9b2a017930030e9b50c5784f64545db (diff)
Merge branch '2023-04-27-introduce-nvm-xip-block-storage-emulation'
To quote the author: Adding block storage emulation for NVM XIP flash devices. Some paltforms such as Corstone-1000 need to see NVM XIP raw flash as a block storage device with read only capability. Here NVM flash devices are devices with addressable memory (e.g: QSPI NOR flash). The NVM XIP block storage emulation provides the following features: - Emulate NVM XIP raw flash as a block storage device with read only capability - Being generic by design and can be used by any platform - Device tree node - Platforms can use multiple NVM XIP devices at the same time by defining a DT node for each one of them - A generic NVMXIP block driver allowing to read from the XIP flash - A generic NVMXIP Uclass driver for binding the block device - A generic NVMXIP QSPI driver - Implemented on top of memory-mapped IO (using readq macro) - Enabling NVMXIP in sandbox64 - A sandbox test case - Enabling NVMXIP in Corstone1000 platform as a use case For more details please refer to doc/develop/driver-model/nvmxip.rst
Diffstat (limited to 'arch/sandbox/cpu/cpu.c')
-rw-r--r--arch/sandbox/cpu/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 636d3545b95..248d17a85c8 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -230,7 +230,7 @@ phys_addr_t map_to_sysmem(const void *ptr)
return mentry->tag;
}
-unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size)
+unsigned long sandbox_read(const void *addr, enum sandboxio_size_t size)
{
struct sandbox_state *state = state_get_current();