diff options
author | Tom Rini <trini@konsulko.com> | 2020-09-25 09:04:01 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2020-09-25 09:04:01 -0400 |
commit | 0ac83d080a0044cd0d8f782ba12f02cf969d3004 (patch) | |
tree | ca5c2351113ba9b56d59e241a8857c7e6e8f5604 /arch/x86/cpu/i386/cpu.c | |
parent | 67ece26d8b5d4bfa4fda8c456261c465d0815d7d (diff) | |
parent | 8c180d669a0f4a8eb70bde8c74c73cef45993f67 (diff) |
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next
- Enhance the 'zboot' command to be more like 'bootm' with sub-commands
- The last series of ACPI core changes for programmatic generation of
ACPI tables
- Add all required ACPI tables for ApolloLake and enable ACPIGEN on
Chromebook Coral
- A feature minor enhancements to the 'hob' command
- Intel edison: Support for writing an xFSTK image via binman
Diffstat (limited to 'arch/x86/cpu/i386/cpu.c')
-rw-r--r-- | arch/x86/cpu/i386/cpu.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index 8f342dd06e2..7517b756f43 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -34,6 +34,10 @@ DECLARE_GLOBAL_DATA_PTR; +#define CPUID_FEATURE_PAE BIT(6) +#define CPUID_FEATURE_PSE36 BIT(17) +#define CPUID_FEAURE_HTT BIT(28) + /* * Constructor for a conventional segment GDT (or LDT) entry * This is a macro so it can be used in initialisers @@ -388,6 +392,25 @@ static void setup_identity(void) } } +static uint cpu_cpuid_extended_level(void) +{ + return cpuid_eax(0x80000000); +} + +int cpu_phys_address_size(void) +{ + if (!has_cpuid()) + return 32; + + if (cpu_cpuid_extended_level() >= 0x80000008) + return cpuid_eax(0x80000008) & 0xff; + + if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36)) + return 36; + + return 32; +} + /* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */ static void setup_pci_ram_top(void) { |