diff options
author | Tom Rini <trini@konsulko.com> | 2016-03-14 19:21:44 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2016-03-14 19:21:44 -0400 |
commit | 88033d737d9f46e7eebda6a8f9770957eb9aae9c (patch) | |
tree | 0b7c3bc6caa5ab4b7f8e88f05ce51ace87f25890 /arch/x86/cpu/ivybridge/cpu.c | |
parent | 9f0f432c0aea1e70959a0c06938459d3175a36b0 (diff) | |
parent | 608e399fdef82e983db44c5cb8f5e772bba870e2 (diff) |
Merge git://git.denx.de/u-boot-dm
Diffstat (limited to 'arch/x86/cpu/ivybridge/cpu.c')
-rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 948833c0285..5d839a7e1be 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -104,9 +104,9 @@ int arch_cpu_init_dm(void) /* TODO(sjg@chromium.org): Get rid of gd->hose */ gd->hose = hose; - ret = uclass_first_device(UCLASS_LPC, &dev); - if (!dev) - return -ENODEV; + ret = uclass_first_device_err(UCLASS_LPC, &dev); + if (ret) + return ret; /* * We should do as little as possible before the serial console is @@ -210,11 +210,9 @@ int print_cpuinfo(void) /* Early chipset init required before RAM init can work */ uclass_first_device(UCLASS_NORTHBRIDGE, &dev); - ret = uclass_first_device(UCLASS_LPC, &lpc); + ret = uclass_first_device_err(UCLASS_LPC, &lpc); if (ret) return ret; - if (!dev) - return -ENODEV; /* Cause the SATA device to do its early init */ uclass_first_device(UCLASS_DISK, &dev); @@ -236,11 +234,9 @@ int print_cpuinfo(void) post_code(POST_EARLY_INIT); /* Enable SPD ROMs and DDR-III DRAM */ - ret = uclass_first_device(UCLASS_I2C, &dev); + ret = uclass_first_device_err(UCLASS_I2C, &dev); if (ret) return ret; - if (!dev) - return -ENODEV; /* Prepare USB controller early in S3 resume */ if (boot_mode == PEI_BOOT_RESUME) |