diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2018-06-03 19:04:22 -0700 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2018-06-13 09:50:57 +0800 |
commit | bc728b1bc0091e5614e82a499820ee8983c7a0b3 (patch) | |
tree | 37cc858a4593178d1d313cc8c3b1062c70b1c805 /arch/x86/cpu/quark/quark.c | |
parent | 0a6fb5b5773eab9d5ebd8e72c13c90b1a634cf4c (diff) |
x86: irq: Remove chipset specific irq router drivers
At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.
Now we remove these specific drivers and make all x86 boards use
the common one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/quark/quark.c')
-rw-r--r-- | arch/x86/cpu/quark/quark.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 46141c434dd..4fd686424d9 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -7,6 +7,7 @@ #include <mmc.h> #include <asm/io.h> #include <asm/ioapic.h> +#include <asm/irq.h> #include <asm/mrccache.h> #include <asm/mtrr.h> #include <asm/pci.h> @@ -313,12 +314,37 @@ static void quark_usb_init(void) writel((0xf << 16) | 0xf, bar + USBD_EP_INT_STS); } +static void quark_irq_init(void) +{ + struct quark_rcba *rcba; + u32 base; + + qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_RCBA, &base); + base &= ~MEM_BAR_EN; + rcba = (struct quark_rcba *)base; + + /* + * Route Quark PCI device interrupt pin to PIRQ + * + * Route device#23's INTA/B/C/D to PIRQA/B/C/D + * Route device#20,21's INTA/B/C/D to PIRQE/F/G/H + */ + writew(PIRQC, &rcba->rmu_ir); + writew(PIRQA | (PIRQB << 4) | (PIRQC << 8) | (PIRQD << 12), + &rcba->d23_ir); + writew(PIRQD, &rcba->core_ir); + writew(PIRQE | (PIRQF << 4) | (PIRQG << 8) | (PIRQH << 12), + &rcba->d20d21_ir); +} + int arch_early_init_r(void) { quark_pcie_init(); quark_usb_init(); + quark_irq_init(); + return 0; } |