diff options
| author | Tom Rini <trini@konsulko.com> | 2019-10-08 18:45:26 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-10-08 18:45:26 -0400 |
| commit | efea5a34bb5be542630ce7161bd3b9cc26a0bcf3 (patch) | |
| tree | fb747d83d81f9c3400a561782114e4c6ecd61a07 /arch/x86/cpu/turbo.c | |
| parent | 9d536fe8ae7672bdee091f9100389b6f3e53cfc6 (diff) | |
| parent | cc2d27dcdc3e1c76d09d54015e3992380bd7e0fa (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl
Diffstat (limited to 'arch/x86/cpu/turbo.c')
| -rw-r--r-- | arch/x86/cpu/turbo.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c index a41d511238d..be468d2b2ca 100644 --- a/arch/x86/cpu/turbo.c +++ b/arch/x86/cpu/turbo.c @@ -60,8 +60,8 @@ int turbo_get_state(void) cpuid_regs = cpuid(CPUID_LEAF_PM); turbo_cap = !!(cpuid_regs.eax & PM_CAP_TURBO_MODE); - msr = msr_read(MSR_IA32_MISC_ENABLES); - turbo_en = !(msr.hi & H_MISC_DISABLE_TURBO); + msr = msr_read(MSR_IA32_MISC_ENABLE); + turbo_en = !(msr.hi & MISC_DISABLE_TURBO); if (!turbo_cap && turbo_en) { /* Unavailable */ @@ -86,9 +86,9 @@ void turbo_enable(void) /* Only possible if turbo is available but hidden */ if (turbo_get_state() == TURBO_DISABLED) { /* Clear Turbo Disable bit in Misc Enables */ - msr = msr_read(MSR_IA32_MISC_ENABLES); - msr.hi &= ~H_MISC_DISABLE_TURBO; - msr_write(MSR_IA32_MISC_ENABLES, msr); + msr = msr_read(MSR_IA32_MISC_ENABLE); + msr.hi &= ~MISC_DISABLE_TURBO; + msr_write(MSR_IA32_MISC_ENABLE, msr); /* Update cached turbo state */ set_global_turbo_state(TURBO_ENABLED); |