diff options
author | Simon Glass <sjg@chromium.org> | 2019-09-25 08:56:37 -0600 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2019-10-08 13:57:47 +0800 |
commit | 55a6b13a75276fbdf7186b34b4ad72238a7ec16b (patch) | |
tree | 9efd23735408507ff6fd90df3f27ebcdc6888607 /arch/x86/cpu | |
parent | 246ac08b037befab08805750049df75044ab7f6c (diff) |
x86: Use a common bus clock for Intel CPUs
Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in
a common file and tidy up the copies.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r-- | arch/x86/cpu/broadwell/cpu.c | 2 | ||||
-rw-r--r-- | arch/x86/cpu/broadwell/cpu_full.c | 4 | ||||
-rw-r--r-- | arch/x86/cpu/ivybridge/model_206ax.c | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 61003a6d68f..586a2e8f05a 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -60,7 +60,7 @@ void set_max_freq(void) msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("CPU: frequency set to %d MHz\n", - ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } int arch_cpu_init(void) diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index d1f3c07109f..58cc2f362cc 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -360,7 +360,7 @@ static void set_max_ratio(void) msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("cpu: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } int broadwell_init(struct udevice *dev) @@ -634,7 +634,7 @@ void cpu_set_power_limits(int power_limit_1_time) static int broadwell_get_info(struct udevice *dev, struct cpu_info *info) { - return cpu_intel_get_info(info, BROADWELL_BCLK); + return cpu_intel_get_info(info, INTEL_BCLK_MHZ); } static int broadwell_get_count(struct udevice *dev) diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index ed66d2dd8d7..3177ba3297f 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -346,7 +346,7 @@ static void set_max_ratio(void) msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("model_x06ax: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } static void set_energy_perf_bias(u8 policy) @@ -418,7 +418,7 @@ static int model_206ax_init(struct udevice *dev) static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info) { - return cpu_intel_get_info(info, SANDYBRIDGE_BCLK); + return cpu_intel_get_info(info, INTEL_BCLK_MHZ); return 0; } |