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| author | Tom Rini <trini@konsulko.com> | 2021-08-02 21:35:50 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-08-02 21:35:50 -0400 |
| commit | 3b64774323298362f9833aac75bb4639b4f98999 (patch) | |
| tree | 34a6428754d442d5559a7131ff27225ec7c0663a /arch/x86/include/asm/mtrr.h | |
| parent | 51aef405550e603ff702c034f0e2cd0f15bdf2bb (diff) | |
| parent | 9feb5bdcc07b27806df07fd6b9260bb5cdef072d (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Fixed broken ICH SPI driver in software sequencer mode
- Added "m25p,fast-read" to SPI flash node for x86 boards
- Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds
- Define a default TSC timer frequency for all x86 boards
- x86 MTRR MSR programming codes bug fixes
- x86 "hob" command bug fixes
- Don't program MTRR for DRAM for FSP1
- Move INIT_PHASE_END_FIRMWARE to FSP2
- Use external graphics card by default on Intel Crown Bay
- tangier: Fix DMA controller IRQ polarity in CSRT
Diffstat (limited to 'arch/x86/include/asm/mtrr.h')
| -rw-r--r-- | arch/x86/include/asm/mtrr.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 384672e93fb..d1aa86bf1d0 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -119,7 +119,7 @@ void mtrr_close(struct mtrr_state *state, bool do_caches); * * @type: Requested type (MTRR_TYPE_) * @start: Start address - * @size: Size + * @size: Size, must be power of 2 * * @return: 0 on success, non-zero on failure */ @@ -144,8 +144,9 @@ int mtrr_commit(bool do_caches); * * @type: Requested type (MTRR_TYPE_) * @start: Start address - * @size: Size - * @return 0 on success, -ENOSPC if there are no more MTRRs + * @size: Size, must be power of 2 + * @return 0 on success, -EINVAL if size is not power of 2, + * -ENOSPC if there are no more MTRRs */ int mtrr_set_next_var(uint type, uint64_t base, uint64_t size); |