Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl

1 files changed, 2 insertions, 63 deletions

diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index ed0827c6e92..40ba866d77c 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -4,10 +4,10 @@
  */
 
 #include <common.h>
+#include <acpi_s3.h>
 #include <dm.h>
 #include <errno.h>
 #include <rtc.h>
-#include <asm/acpi_s3.h>
 #include <asm/cmos_layout.h>
 #include <asm/early_cmos.h>
 #include <asm/io.h>
@@ -55,11 +55,9 @@ void board_final_cleanup(void)
 		debug("fail, error code %x\n", status);
 	else
 		debug("OK\n");
-
-	return;
 }
 
-static __maybe_unused void *fsp_prepare_mrc_cache(void)
+void *fsp_prepare_mrc_cache(void)
 {
 	struct mrc_data_container *cache;
 	struct mrc_region entry;
@@ -104,62 +102,3 @@ int fsp_save_s3_stack(void)
 	return 0;
 }
 #endif
-
-int arch_fsp_init(void)
-{
-	void *nvs;
-	int stack = CONFIG_FSP_TEMP_RAM_ADDR;
-	int boot_mode = BOOT_FULL_CONFIG;
-#ifdef CONFIG_HAVE_ACPI_RESUME
-	int prev_sleep_state = chipset_prev_sleep_state();
-	gd->arch.prev_sleep_state = prev_sleep_state;
-#endif
-
-	if (!gd->arch.hob_list) {
-#ifdef CONFIG_ENABLE_MRC_CACHE
-		nvs = fsp_prepare_mrc_cache();
-#else
-		nvs = NULL;
-#endif
-
-#ifdef CONFIG_HAVE_ACPI_RESUME
-		if (prev_sleep_state == ACPI_S3) {
-			if (nvs == NULL) {
-				/* If waking from S3 and no cache then */
-				debug("No MRC cache found in S3 resume path\n");
-				post_code(POST_RESUME_FAILURE);
-				/* Clear Sleep Type */
-				chipset_clear_sleep_state();
-				/* Reboot */
-				debug("Rebooting..\n");
-				outb(SYS_RST | RST_CPU, IO_PORT_RESET);
-				/* Should not reach here.. */
-				panic("Reboot System");
-			}
-
-			/*
-			 * DM is not available yet at this point, hence call
-			 * CMOS access library which does not depend on DM.
-			 */
-			stack = cmos_read32(CMOS_FSP_STACK_ADDR);
-			boot_mode = BOOT_ON_S3_RESUME;
-		}
-#endif
-		/*
-		 * The first time we enter here, call fsp_init().
-		 * Note the execution does not return to this function,
-		 * instead it jumps to fsp_continue().
-		 */
-		fsp_init(stack, boot_mode, nvs);
-	} else {
-		/*
-		 * The second time we enter here, adjust the size of malloc()
-		 * pool before relocation. Given gd->malloc_base was adjusted
-		 * after the call to board_init_f_init_reserve() in arch/x86/
-		 * cpu/start.S, we should fix up gd->malloc_limit here.
-		 */
-		gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
-	}
-
-	return 0;
-}