Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master

* 'master' of ssh://gemini/home/wd/git/u-boot/master:
  board/emk/top860/top860.c: Fix GCC 4.6 build warning
  board/sbc405/strataflash.c: Fix GCC 4.6 build warning
  arch/powerpc/cpu/mpc86xx/cpu.c: Fix GCC 4.6 build warning
  board/freescale/mpc8610hpcd/mpc8610hpcd.c: Fix GCC 4.6 build warning
  board/mpl/common/flash.c: Fix GCC 4.6 build warning
  post/board/lwmon5/gdc.c: Fix GCC 4.6 build warning
  drivers/usb/host/sl811-hcd.c: Fix GCC 4.6 build warning
  board/sandburst/common/flash.c: Fix GCC 4.6 build warning
  DB64460: Fix GCC 4.6 build warnings
  DB64360: Fix GCC 4.6 build warnings
  board/cray/L1/flash.c: Fix GCC 4.6 build warning
  drivers/block/sata_dwc.c: Fix GCC 4.6 build warning
  board/amirix/ap1000/flash.c: Fix GCC 4.6 build warning
  alpr board: Fix GCC 4.6 build warnings
  image: Don't detect XIP images as overlapping.
  image: Implement IH_TYPE_KERNEL_NOLOAD
  ppc4xx: Add Io64 board support
  ppc4xx: fix PMC440 painit command
  ppc4xx: remove invalid access to PCI_BRDGOPT2 register
  ppc4xx: use CONFIG_PCI_BOOTDELAY instead of private implementation
  mpc85xx: support for Freescale COM Express P2020
  arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
  mpc85xx: support board-specific reset function
  powerpc/85xx: verify the localbus device tree address before booting the OS
  mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
  powerpc/p3060qds: Add board related support for P3060QDS platform
  powerpc/85xx: clean up and document the QE/FMAN microcode macros
  powerpc/85xx: always implement the work-around for Erratum SATA_A001
  powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
  powerpc/85xx: Add workaround for erratum A-003474
  powerpc/85xx: fixup flexcan device tree clock-frequency
  powerpc/85xx: Add workaround for erratum CPU-A003999
  x86: Fix some bugs in the i8402 driver when no controller is present
  x86: Make the i8042 driver checkpatch clean
  x86: Wrap small helper functions from libgcc to avoid an ABI mismatch
  x86: Import the glibc memset implementation
  x86: Fix a few recently added bugs
  x86: Don't relocate symbols which point to things that aren't relocated
  x86: Fix how the location of the realmode and bios blobs are calculated
  x86: Misc cleanups
  x86: Misc PCI touchups
  x86: Ensure IDT and GDT remain 16-byte aligned post relocation
  x86: Provide more configuration granularity
  x86: Add multiboot header
  sc520: Create arch asm-offsets
  x86: Punt cold- and warm-boot flags
  cosmetic: checkpatch cleanup of board/eNET/*.c
  cosmetic: checkpatch cleanup of arch/x86/lib/*.c
  cosmetic: checkpatch cleanup of arch/x86/cpu/sc520/*.c
  cosmetic: checkpatch cleanup of arch/x86/cpu/*.c
  x86: Call hang() on unrecoverable exception
  menu.c: use puts() instead of printf() where possible
  MAKEALL: drop obsolete mx31pdk_nand target
  dataflash: fix parameters order in write_dataflash()
  hawkboard: Replace HAWKBOARD_KICK{0, 1}_UNLOCK defines
  davinci_sonata: define CONFIG_MACH_TYPE for davinci_sonata board
  davinci_schmoogie: define CONFIG_MACH_TYPE for davinci_schmoogie board
  arm: a320evb: define mach-type in board config file
  OMAP3: Use sdelay from arch/arm/cpu/armv7/syslib.c instead of cloning that.
  Fix Stelian's email address
  DIU: 1080P and 720P support
  CFB: Fix font rendering on mx5 framebuffer

1 files changed, 68 insertions, 30 deletions

diff --git a/arch/x86/lib/pci.c b/arch/x86/lib/pci.c
index 593a7db75f8..71878dd7dcb 100644
--- a/arch/x86/lib/pci.c
+++ b/arch/x86/lib/pci.c
@@ -42,11 +42,13 @@ int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
 	u16 device;
 	u32 class_code;
 
+	u32 pci_data;
+
 	hose = pci_bus_to_hose(PCI_BUS(dev));
-#if 0
-	printf("pci_shadow_rom() asked to shadow device %x to %x\n",
+
+	debug("pci_shadow_rom() asked to shadow device %x to %x\n",
 	       dev, (u32)dest);
-#endif
+
 	pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
 	pci_read_config_word(dev, PCI_DEVICE_ID, &device);
 	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
@@ -67,7 +69,7 @@ int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
 		return -1;
 	}
 
-	size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1;
+	size = (~(addr_reg&PCI_ROM_ADDRESS_MASK)) + 1;
 
 	debug("ROM is %d bytes\n", size);
 
@@ -80,27 +82,25 @@ int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
 			       |PCI_ROM_ADDRESS_ENABLE);
 
 
-	for (i=rom_addr;i<rom_addr+size; i+=512) {
-
-
+	for (i = rom_addr; i < rom_addr + size; i += 512) {
 		if (readw(i) == 0xaa55) {
-			u32 pci_data;
 #ifdef PCI_ROM_SCAN_VERBOSE
 			printf("ROM signature found\n");
 #endif
-			pci_data = readw(0x18+i);
+			pci_data = readw(0x18 + i);
 			pci_data += i;
 
-			if (0==memcmp((void*)pci_data, "PCIR", 4)) {
+			if (0 == memcmp((void *)pci_data, "PCIR", 4)) {
 #ifdef PCI_ROM_SCAN_VERBOSE
-				printf("Fount PCI rom image at offset %d\n", i-rom_addr);
+				printf("Fount PCI rom image at offset %d\n",
+				       i - rom_addr);
 				printf("Vendor %04x device %04x class %06x\n",
-				       readw(pci_data+4), readw(pci_data+6),
-				       readl(pci_data+0x0d)&0xffffff);
+				       readw(pci_data + 4), readw(pci_data + 6),
+				       readl(pci_data + 0x0d) & 0xffffff);
 				printf("%s\n",
-				       (readw(pci_data+0x15) &0x80)?
-				       "Last image":"More images follow");
-				switch	(readb(pci_data+0x14)) {
+				       (readw(pci_data + 0x15) & 0x80) ?
+				       "Last image" : "More images follow");
+				switch	(readb(pci_data + 0x14)) {
 				case 0:
 					printf("X86 code\n");
 					break;
@@ -111,35 +111,38 @@ int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
 					printf("PARISC code\n");
 					break;
 				}
-				printf("Image size %d\n", readw(pci_data+0x10) * 512);
+				printf("Image size %d\n",
+				       readw(pci_data + 0x10) * 512);
 #endif
-				/* FixMe: I think we should compare the class code
-				 * bytes as well but I have no reference on the
-				 * exact order of these bytes in the PCI ROM header */
-				if (readw(pci_data+4) == vendor &&
-				    readw(pci_data+6) == device &&
-				    /* (readl(pci_data+0x0d)&0xffffff) == class_code && */
-				    readb(pci_data+0x14) == 0 /* x86 code image */ ) {
+				/*
+				 * FixMe: I think we should compare the class
+				 * code bytes as well but I have no reference
+				 * on the exact order of these bytes in the PCI
+				 * ROM header
+				 */
+				if (readw(pci_data + 4) == vendor &&
+				    readw(pci_data + 6) == device &&
+				    readb(pci_data + 0x14) == 0) {
 #ifdef PCI_ROM_SCAN_VERBOSE
-					printf("Suitable ROM image found, copying\n");
+					printf("Suitable ROM image found\n");
 #endif
-					memmove(dest, (void*)rom_addr, readw(pci_data+0x10) * 512);
+					memmove(dest, (void *)rom_addr,
+						readw(pci_data + 0x10) * 512);
 					res = 0;
 					break;
 
 				}
-				if (readw(pci_data+0x15) &0x80) {
+
+				if (readw(pci_data + 0x15) & 0x80)
 					break;
-				}
 			}
 		}
 
 	}
 
 #ifdef PCI_ROM_SCAN_VERBOSE
-	if (res) {
+	if (res)
 		printf("No suitable image found\n");
-	}
 #endif
 	/* disable PAR register and PCI device ROM address devocer */
 	pci_remove_rom_window(hose, rom_addr);
@@ -148,3 +151,38 @@ int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
 
 	return res;
 }
+
+#ifdef PCI_BIOS_DEBUG
+
+void print_bios_bios_stat(void)
+{
+	printf("16 bit functions:\n");
+	printf("pci_bios_present:                %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_present));
+	printf("pci_bios_find_device:            %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_find_device));
+	printf("pci_bios_find_class:             %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_find_class));
+	printf("pci_bios_generate_special_cycle: %d\n",
+			RELOC_16_LONG(0xf000,
+				      num_pci_bios_generate_special_cycle));
+	printf("pci_bios_read_cfg_byte:          %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_byte));
+	printf("pci_bios_read_cfg_word:          %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_word));
+	printf("pci_bios_read_cfg_dword:         %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_read_cfg_dword));
+	printf("pci_bios_write_cfg_byte:         %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_byte));
+	printf("pci_bios_write_cfg_word:         %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_word));
+	printf("pci_bios_write_cfg_dword:        %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_write_cfg_dword));
+	printf("pci_bios_get_irq_routing:        %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_get_irq_routing));
+	printf("pci_bios_set_irq:                %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_set_irq));
+	printf("pci_bios_unknown_function:       %d\n",
+			RELOC_16_LONG(0xf000, num_pci_bios_unknown_function));
+}
+#endif