diff options
| author | Tom Rini <trini@konsulko.com> | 2022-01-29 13:42:58 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-01-29 13:42:58 -0500 |
| commit | 98a90b2730696c1ba773359b7944f6685ae13344 (patch) | |
| tree | 6376c36f19409294563fc843bf4d5bbd8959418d /arch | |
| parent | 2d0953c0e0de02dc470345c2b07d77d2a782dba6 (diff) | |
| parent | 1e69db57e64249f7f7a5a282a3a2f1b053be3f6f (diff) | |
Merge branch '2022-01-28-assorted-fixes'
- Extend the pci command to support a few more features.
- Add support for custom SPL boot device names (so it's easier for users
to understand)
- Updates for am64x to address some review comments.
- Migration deadline notice for DM_SERIAL
- coreboot payload test
- Support rsa3072 signatures.
- DFU should skip writing empty UBI pages, bootcount printf format char
correction.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/k3-am642-r5-sk.dts | 11 | ||||
| -rw-r--r-- | arch/arm/dts/k3-am642-sk-u-boot.dtsi | 8 |
2 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 3a17448ca0e..7d1cb856156 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -231,23 +231,12 @@ &rgmii2_pins_default>; }; -&cpsw_port1 { - phy-mode = "rgmii-rxid"; - phy-handle = <&cpsw3g_phy0>; -}; - &cpsw_port2 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; }; &cpsw3g_mdio { - cpsw3g_phy0: ethernet-phy@0 { - reg = <0>; - ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; - ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; - }; - cpsw3g_phy1: ethernet-phy@1 { reg = <1>; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index 2f5cfaa04fd..e5c26b83264 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -117,10 +117,6 @@ u-boot,dm-spl; }; -&cpsw_port1 { - u-boot,dm-spl; -}; - &main_bcdma { u-boot,dm-spl; }; @@ -141,10 +137,6 @@ u-boot,dm-spl; }; -&cpsw3g_phy0 { - u-boot,dm-spl; -}; - &cpsw3g_phy1 { u-boot,dm-spl; }; |
