diff options
author | Tom Rini <trini@konsulko.com> | 2023-08-18 10:05:04 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2023-08-18 10:05:04 -0400 |
commit | 2d8e7ac3202bbde28100b545a160a2d634844f1c (patch) | |
tree | ada112814b14fd4596c5b2483ee8cf5bc7f9fcbd /board/asus/grouper/grouper-spl-ti.c | |
parent | 3a438c1dbc23740fa3142bc5277ed3204b4e3eb9 (diff) | |
parent | bdf9dead86f06c7d6980c399a4a6339430b531ec (diff) |
Merge tag 'tegra-for-2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-tegra
ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
Diffstat (limited to 'board/asus/grouper/grouper-spl-ti.c')
-rw-r--r-- | board/asus/grouper/grouper-spl-ti.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/board/asus/grouper/grouper-spl-ti.c b/board/asus/grouper/grouper-spl-ti.c new file mode 100644 index 00000000000..e5b78f01215 --- /dev/null +++ b/board/asus/grouper/grouper-spl-ti.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 Grouper TI SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2022 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <common.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include <linux/delay.h> + +#define TPS65911_I2C_ADDR (0x2D << 1) +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62361B_I2C_ADDR (0x60 << 1) +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, TPS62361B_SET3_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} |