diff options
| author | Tom Rini <trini@konsulko.com> | 2022-12-05 21:04:24 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-05 21:04:24 -0500 |
| commit | d2ad92927ea91ab8cece92a308350602c594dd3e (patch) | |
| tree | 23ec41dc6f0aff10b800c69396a32ac5ac926817 /board/atmel/at91sam9261ek/at91sam9261ek.c | |
| parent | 1c470f32f74248ff4aa145bf033fb6524dc7fc2e (diff) | |
| parent | 7102d324f6b41741ee74587d43d77b302b1bbd96 (diff) | |
Merge branch '2022-12-05-Kconfig-migrations-and-renames' into next
- First batch of the patches that end up with
scripts/config_whitelist.tx being empty. Mostly migrations and a
little bit of code removal and CFG renaming.
Diffstat (limited to 'board/atmel/at91sam9261ek/at91sam9261ek.c')
| -rw-r--r-- | board/atmel/at91sam9261ek/at91sam9261ek.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 0c53325ba71..eab3a130819 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -78,10 +78,10 @@ static void at91sam9261ek_nand_hw_init(void) at91_periph_clk_enable(ATMEL_ID_PIOC); /* Configure RDY/BSY */ - at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1); /* Enable NandFlash */ - at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1); at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ @@ -156,7 +156,7 @@ int board_init(void) gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK; #endif /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; #ifdef CONFIG_CMD_NAND at91sam9261ek_nand_hw_init(); @@ -176,8 +176,8 @@ int board_eth_init(struct bd_info *bis) int dram_init(void) { - gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, - CONFIG_SYS_SDRAM_SIZE); + gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, + CFG_SYS_SDRAM_SIZE); return 0; } |