summaryrefslogtreecommitdiff
path: root/board/dhelectronics/dh_stm32mp1/board.c
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2022-09-08 08:33:41 -0400
committerTom Rini <trini@konsulko.com>2022-09-08 08:33:41 -0400
commite9de8c8c649044080371399a1ef4923b08632611 (patch)
treededfaadf7f1c9f38f60dfc75c24f5229e0b6c8e8 /board/dhelectronics/dh_stm32mp1/board.c
parente3fce5e5604472a20fbce78ca12d07712f2dd86d (diff)
parentd6ff3c9f04f744345fe77a3d82c5b5e0c07c456a (diff)
Merge tag 'u-boot-stm32-20220907' of https://source.denx.de/u-boot/custodians/u-boot-stm
- simplify the STM32MP15x package parsing code - remove test on CONFIG_DM_REGULATOR in stm32mp1 board and enable CONFIG_DM_REGULATOR for stm32f769-disco - handle ck_usbo_48m clock provided by USBPHYC to fix the command 'usb start' after alignment with Linux kernel v5.19 DT (clocks = <&usbphyc>) - Fix SYS_HZ_CLOCK value for stih410-b2260 board - Switch STMM32MP15x DHSOM to FMC2 EBI driver - Remove hwlocks from pinctrl in STM32MP15x to avoid issue with kernel
Diffstat (limited to 'board/dhelectronics/dh_stm32mp1/board.c')
-rw-r--r--board/dhelectronics/dh_stm32mp1/board.c52
1 files changed, 0 insertions, 52 deletions
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index e3c7ed10492..9188f5381eb 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -527,56 +527,6 @@ static void sysconf_init(void)
#endif
}
-static void board_init_fmc2(void)
-{
-#define STM32_FMC2_BCR1 0x0
-#define STM32_FMC2_BTR1 0x4
-#define STM32_FMC2_BWTR1 0x104
-#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1)
-#define STM32_FMC2_BCRx_FMCEN BIT(31)
-#define STM32_FMC2_BCRx_WREN BIT(12)
-#define STM32_FMC2_BCRx_RSVD BIT(7)
-#define STM32_FMC2_BCRx_FACCEN BIT(6)
-#define STM32_FMC2_BCRx_MWID(n) ((n) << 4)
-#define STM32_FMC2_BCRx_MTYP(n) ((n) << 2)
-#define STM32_FMC2_BCRx_MUXEN BIT(1)
-#define STM32_FMC2_BCRx_MBKEN BIT(0)
-#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1)
-#define STM32_FMC2_BTRx_DATAHLD(n) ((n) << 30)
-#define STM32_FMC2_BTRx_BUSTURN(n) ((n) << 16)
-#define STM32_FMC2_BTRx_DATAST(n) ((n) << 8)
-#define STM32_FMC2_BTRx_ADDHLD(n) ((n) << 4)
-#define STM32_FMC2_BTRx_ADDSET(n) ((n) << 0)
-
-#define RCC_MP_AHB6RSTCLRR 0x218
-#define RCC_MP_AHB6RSTCLRR_FMCRST BIT(12)
-#define RCC_MP_AHB6ENSETR 0x19c
-#define RCC_MP_AHB6ENSETR_FMCEN BIT(12)
-
- const u32 bcr = STM32_FMC2_BCRx_WREN |STM32_FMC2_BCRx_RSVD |
- STM32_FMC2_BCRx_FACCEN | STM32_FMC2_BCRx_MWID(1) |
- STM32_FMC2_BCRx_MTYP(2) | STM32_FMC2_BCRx_MUXEN |
- STM32_FMC2_BCRx_MBKEN;
- const u32 btr = STM32_FMC2_BTRx_DATAHLD(3) |
- STM32_FMC2_BTRx_BUSTURN(2) |
- STM32_FMC2_BTRx_DATAST(0x22) |
- STM32_FMC2_BTRx_ADDHLD(2) |
- STM32_FMC2_BTRx_ADDSET(2);
-
- /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
- writel(RCC_MP_AHB6RSTCLRR_FMCRST, STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
- writel(RCC_MP_AHB6ENSETR_FMCEN, STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
-
- /* KS8851-16MLL -- Muxed mode */
- writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
- writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
- /* AS7C34098 SRAM on X11 -- Muxed mode */
- writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
- writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
-
- setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, STM32_FMC2_BCRx_FMCEN);
-}
-
#ifdef CONFIG_DM_REGULATOR
#define STPMIC_NVM_BUCKS_VOUT_SHR 0xfc
#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V2 0
@@ -671,8 +621,6 @@ int board_init(void)
sysconf_init();
- board_init_fmc2();
-
return 0;
}