diff options
| author | Wolfgang Denk <wd@denx.de> | 2021-09-27 17:42:36 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-09-30 08:08:56 -0400 |
| commit | 66356b4c06c934021f6cb58d93877427162b369f (patch) | |
| tree | 4d37c220f907db52286ed22adc92f3ffbda7350e /board/freescale/imx8mn_evk/ddr4_timing_ld.c | |
| parent | 6eecaf5d0f6b9a500dd5798f1f2bc8296bcfe158 (diff) | |
WS cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/freescale/imx8mn_evk/ddr4_timing_ld.c')
| -rw-r--r-- | board/freescale/imx8mn_evk/ddr4_timing_ld.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/board/freescale/imx8mn_evk/ddr4_timing_ld.c b/board/freescale/imx8mn_evk/ddr4_timing_ld.c index 983fc7d99ff..a3577efd0b2 100644 --- a/board/freescale/imx8mn_evk/ddr4_timing_ld.c +++ b/board/freescale/imx8mn_evk/ddr4_timing_ld.c @@ -1054,4 +1054,3 @@ struct dram_timing_info dram_timing = { .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), .fsp_table = { 1600, 1066, }, }; - |