diff options
| author | Tom Rini <trini@konsulko.com> | 2022-11-16 13:10:41 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-05 16:06:08 -0500 |
| commit | 65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8 (patch) | |
| tree | e1b9902c5257875fc5fe8243e1e759594f90beed /board/freescale/ls1043aqds | |
| parent | a322afc9f9b69dd52a9bc72937cd5adc18ea55c7 (diff) | |
global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/freescale/ls1043aqds')
| -rw-r--r-- | board/freescale/ls1043aqds/ls1043aqds.c | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 5fe40c4bdb2..841d8b59bb4 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -57,8 +57,8 @@ enum { struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { { "nor0", - CONFIG_SYS_NOR0_CSPR, - CONFIG_SYS_NOR0_CSPR_EXT, + CFG_SYS_NOR0_CSPR, + CFG_SYS_NOR0_CSPR_EXT, CFG_SYS_NOR_AMASK, CFG_SYS_NOR_CSOR, { @@ -71,8 +71,8 @@ struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { }, { "nor1", - CONFIG_SYS_NOR1_CSPR, - CONFIG_SYS_NOR1_CSPR_EXT, + CFG_SYS_NOR1_CSPR, + CFG_SYS_NOR1_CSPR_EXT, CFG_SYS_NOR_AMASK, CFG_SYS_NOR_CSOR, { @@ -97,15 +97,15 @@ struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { }, { "fpga", - CONFIG_SYS_FPGA_CSPR, - CONFIG_SYS_FPGA_CSPR_EXT, - CONFIG_SYS_FPGA_AMASK, - CONFIG_SYS_FPGA_CSOR, + CFG_SYS_FPGA_CSPR, + CFG_SYS_FPGA_CSPR_EXT, + CFG_SYS_FPGA_AMASK, + CFG_SYS_FPGA_CSOR, { - CONFIG_SYS_FPGA_FTIM0, - CONFIG_SYS_FPGA_FTIM1, - CONFIG_SYS_FPGA_FTIM2, - CONFIG_SYS_FPGA_FTIM3 + CFG_SYS_FPGA_FTIM0, + CFG_SYS_FPGA_FTIM1, + CFG_SYS_FPGA_FTIM2, + CFG_SYS_FPGA_FTIM3 }, } }; @@ -126,8 +126,8 @@ struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { }, { "nor0", - CONFIG_SYS_NOR0_CSPR, - CONFIG_SYS_NOR0_CSPR_EXT, + CFG_SYS_NOR0_CSPR, + CFG_SYS_NOR0_CSPR_EXT, CFG_SYS_NOR_AMASK, CFG_SYS_NOR_CSOR, { @@ -139,8 +139,8 @@ struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { }, { "nor1", - CONFIG_SYS_NOR1_CSPR, - CONFIG_SYS_NOR1_CSPR_EXT, + CFG_SYS_NOR1_CSPR, + CFG_SYS_NOR1_CSPR_EXT, CFG_SYS_NOR_AMASK, CFG_SYS_NOR_CSOR, { @@ -152,15 +152,15 @@ struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { }, { "fpga", - CONFIG_SYS_FPGA_CSPR, - CONFIG_SYS_FPGA_CSPR_EXT, - CONFIG_SYS_FPGA_AMASK, - CONFIG_SYS_FPGA_CSOR, + CFG_SYS_FPGA_CSPR, + CFG_SYS_FPGA_CSPR_EXT, + CFG_SYS_FPGA_AMASK, + CFG_SYS_FPGA_CSOR, { - CONFIG_SYS_FPGA_FTIM0, - CONFIG_SYS_FPGA_FTIM1, - CONFIG_SYS_FPGA_FTIM2, - CONFIG_SYS_FPGA_FTIM3 + CFG_SYS_FPGA_FTIM0, + CFG_SYS_FPGA_FTIM1, + CFG_SYS_FPGA_FTIM2, + CFG_SYS_FPGA_FTIM3 }, } }; |