diff options
| author | Tom Rini <trini@konsulko.com> | 2021-09-29 07:58:20 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-09-29 07:58:20 -0400 |
| commit | 6eecaf5d0f6b9a500dd5798f1f2bc8296bcfe158 (patch) | |
| tree | 1307de30a7d4cc6e5db9a3d78f583d288a5dbbdb /board/freescale/ls1043aqds | |
| parent | ba17871884c10f64082ddba2f0632ec44a3ae490 (diff) | |
| parent | 4df9f5e39fb224a4857c3411b4cbe419e4d339e8 (diff) | |
Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net into next
- Fix some non-NULL terminated strings in the networking subsystem
- net: tsec: Mark tsec_get_interface as __maybe_unused
Diffstat (limited to 'board/freescale/ls1043aqds')
| -rw-r--r-- | board/freescale/ls1043aqds/README | 2 | ||||
| -rw-r--r-- | board/freescale/ls1043aqds/eth.c | 12 |
2 files changed, 7 insertions, 7 deletions
diff --git a/board/freescale/ls1043aqds/README b/board/freescale/ls1043aqds/README index 913537d4519..f5aa51da87e 100644 --- a/board/freescale/ls1043aqds/README +++ b/board/freescale/ls1043aqds/README @@ -18,7 +18,7 @@ SoC overview. - SGMII, SGMII 2.5 - QSGMII - SATA 3.0 - - XFI + - 10GBase-R - DDR Controller - 2GB 40bits (8-bits ECC) DDR4 SDRAM. Support rates of up to 1600MT/s -IFC/Local Bus diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c index c3efe8a0be6..e156ba01045 100644 --- a/board/freescale/ls1043aqds/eth.c +++ b/board/freescale/ls1043aqds/eth.c @@ -176,7 +176,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, "sgmii-riser-s4-p1"); } } else if (fm_info_get_enet_if(port) == - PHY_INTERFACE_MODE_SGMII_2500) { + PHY_INTERFACE_MODE_2500BASEX) { /* 2.5G SGMII interface */ f_link.phy_id = cpu_to_fdt32(port); f_link.duplex = cpu_to_fdt32(1); @@ -187,7 +187,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_delprop(fdt, offset, "phy-handle"); fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link)); fdt_setprop_string(fdt, offset, "phy-connection-type", - "sgmii-2500"); + "2500base-x"); } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_QSGMII) { switch (mdio_mux[port]) { case EMI1_SLOT1: @@ -242,13 +242,13 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, "qsgmii"); } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_XGMII && port == FM1_10GEC1) { - /* XFI interface */ + /* 10GBase-R interface */ f_link.phy_id = cpu_to_fdt32(port); f_link.duplex = cpu_to_fdt32(1); f_link.link_speed = cpu_to_fdt32(10000); f_link.pause = 0; f_link.asym_pause = 0; - /* no PHY for XFI */ + /* no PHY for 10GBase-R */ fdt_delprop(fdt, offset, "phy-handle"); fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link)); fdt_setprop_string(fdt, offset, "phy-connection-type", "xgmii"); @@ -430,12 +430,12 @@ int board_eth_init(struct bd_info *bis) interface = fm_info_get_enet_if(i); switch (interface) { case PHY_INTERFACE_MODE_SGMII: - case PHY_INTERFACE_MODE_SGMII_2500: + case PHY_INTERFACE_MODE_2500BASEX: case PHY_INTERFACE_MODE_QSGMII: if (interface == PHY_INTERFACE_MODE_SGMII) { lane = serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC1 + idx); - } else if (interface == PHY_INTERFACE_MODE_SGMII_2500) { + } else if (interface == PHY_INTERFACE_MODE_2500BASEX) { lane = serdes_get_first_lane(FSL_SRDS_1, SGMII_2500_FM1_DTSEC1 + idx); } else { |