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authorWolfgang Denk <wd@denx.de>2012-04-30 16:45:59 +0200
committerWolfgang Denk <wd@denx.de>2012-04-30 16:45:59 +0200
commit05f132d74d173854df79bc5541699c3db144e42a (patch)
tree7068aef1bd8453964440df9d9e20a0789ba9a7f4 /board/freescale/p1_p2_rdb_pc/ddr.c
parent3f8550c5e93c65433d51c711e5d8d58fa5dfde7d (diff)
parent5f6db68b42024b51a9a1fddd7d4371d2af82c090 (diff)
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians: powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot cmd_bdinfo: display the address map size (32-bit vs. 36-bit) PowerPC: correct the SATA for p1/p2 rdb-pc platform powerpc/corenet_ds: Slave core in holdoff when boot from SRIO powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO powerpc/corenet_ds: Slave uploads ucode when boot from SRIO powerpc/corenet_ds: Slave module for boot from SRIO powerpc/corenet_ds: Master module for boot from SRIO powerpc/corenet_ds: Document for the boot from SRIO powerpc/corenet_ds: Correct the compilation errors about ENV powerpc/srio: Rewrite the struct ccsr_rio powerpc/85xx:Fix lds for nand boot debug info powerpc/p2041rdb: add env in NAND support powerpc/p2041rdb: add NAND and NAND boot support powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards powerpc/85xx:Avoid vector table compilation for nand_spl powerpc/85xx:Fix IVORs addr after vector table relocation powerpc/85xx:Avoid hardcoded vector address for IVORs powerpc/p1023rds: Disable nor flash node and enable nand flash node
Diffstat (limited to 'board/freescale/p1_p2_rdb_pc/ddr.c')
-rw-r--r--board/freescale/p1_p2_rdb_pc/ddr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index f0cbde72abb..88ba56f457e 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -15,7 +15,7 @@
#include <asm/io.h>
#include <asm/fsl_law.h>
-#ifdef CONFIG_DDR_RAW_TIMING
+#ifdef CONFIG_SYS_DDR_RAW_TIMING
#if defined(CONFIG_P1020RDB_PROTO) || \
defined(CONFIG_P1021RDB) || \
defined(CONFIG_P1020UTM)
@@ -204,7 +204,7 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
return 0;
}
-#endif /* CONFIG_DDR_RAW_TIMING */
+#endif /* CONFIG_SYS_DDR_RAW_TIMING */
/* Fixed sdram init -- doesn't use serial presence detect. */
phys_size_t fixed_sdram(void)