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| author | Tom Rini <trini@konsulko.com> | 2020-03-26 13:18:22 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-03-26 13:18:22 -0400 |
| commit | 779e6dc6a429ac28dfd4f07ab0c3648a31399d4a (patch) | |
| tree | 2dfc6d6953793e85d78b4ca79bec6b1a5fbca421 /board/st/stm32mp1/board.c | |
| parent | 2738f0edea7d19960d692284d1f378b1a2b4c4a5 (diff) | |
| parent | 5b5699cdc97122e08e7fd0886a9e4474ca3ccb35 (diff) | |
Merge tag 'u-boot-stm32-20200324' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next
- stm32mp: fix command stboard
- stm32mp: update kernel device tree according the part number
- stm32mp: add 800 MHz profile support = stm32mp15xd and stm32mp15xf
- stm32mp: set cp15 frequency in psci cpu on
- stm32mp: DT alignment with Linux 5.6-rc1
- stm32mp: clk: add SPI5 support and correct CKSELR masks
- stm32mp: ram: fixes on LPDDR2/LPDDR3 support and on tuning
- stm32: i2c: allows for any bus frequency
- sti: timer: livetree and clk API conversion
Diffstat (limited to 'board/st/stm32mp1/board.c')
| -rw-r--r-- | board/st/stm32mp1/board.c | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c index c3d832f5848..4e35d36c76d 100644 --- a/board/st/stm32mp1/board.c +++ b/board/st/stm32mp1/board.c @@ -43,6 +43,7 @@ int board_ddr_power_init(enum ddr_type ddr_type) struct udevice *dev; bool buck3_at_1800000v = false; int ret; + u32 buck2; ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_GET_DRIVER(pmic_stpmic1), &dev); @@ -102,8 +103,10 @@ int board_ddr_power_init(enum ddr_type ddr_type) break; - case STM32MP_LPDDR2: - case STM32MP_LPDDR3: + case STM32MP_LPDDR2_16: + case STM32MP_LPDDR2_32: + case STM32MP_LPDDR3_16: + case STM32MP_LPDDR3_32: /* * configure VDD_DDR1 = LDO3 * Set LDO3 to 1.8V @@ -133,11 +136,23 @@ int board_ddr_power_init(enum ddr_type ddr_type) if (ret < 0) return ret; - /* VDD_DDR2 : Set BUCK2 to 1.2V */ + /* VDD_DDR2 : Set BUCK2 to 1.2V (16bits) or 1.25V (32 bits)*/ + switch (ddr_type) { + case STM32MP_LPDDR2_32: + case STM32MP_LPDDR3_32: + buck2 = STPMIC1_BUCK2_1250000V; + break; + default: + case STM32MP_LPDDR2_16: + case STM32MP_LPDDR3_16: + buck2 = STPMIC1_BUCK2_1200000V; + break; + } + ret = pmic_clrsetbits(dev, STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2), STPMIC1_BUCK_VOUT_MASK, - STPMIC1_BUCK2_1200000V); + buck2); if (ret < 0) return ret; |