Merge tag 'u-boot-rockchip-20240315' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next

Please pull the updates for rockchip platform:
- Add board: rk3588 Generic, Cool Pi CM5, Theobroma-Systems RK3588 Jaguar SBC,
             Toybrick TB-RK3588X;
             rk3588s Cool Pi 4B;
             rk3566 Pine64 PineTab2;
- Add saradc v2 support;
- Add PMIC RK806 support;
- rk3588 disable force_jtag by default;
- Migrate to use IO-domain driver for all boards;
- Use common bss and stack addresses for rk33xx and rk35xx boards;
- Other updates for driver, config and dts;

44 files changed, 349 insertions, 731 deletions

diff --git a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
index d05502f67af..099eea60c39 100644
--- a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
+++ b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
@@ -6,12 +6,14 @@
 #include <abuf.h>
 #include <adc.h>
 #include <asm/io.h>
+#include <command.h>
 #include <display.h>
 #include <dm.h>
 #include <dm/lists.h>
 #include <env.h>
 #include <fdt_support.h>
 #include <linux/delay.h>
+#include <linux/iopoll.h>
 #include <mipi_dsi.h>
 #include <mmc.h>
 #include <panel.h>
@@ -19,6 +21,8 @@
 #include <stdlib.h>
 #include <video_bridge.h>
 
+#define BOOT_BROM_DOWNLOAD	0xef08a53c
+
 #define GPIO0_BASE		0xfdd60000
 #define GPIO4_BASE		0xfe770000
 #define GPIO_SWPORT_DR_L	0x0000
@@ -32,6 +36,14 @@
 
 #define GPIO_WRITEMASK(bits)	((bits) << 16)
 
+#define SARADC_BASE		0xfe720000
+#define SARADC_DATA		0x0000
+#define SARADC_STAS		0x0004
+#define SARADC_ADC_STATUS	BIT(0)
+#define SARADC_CTRL		0x0008
+#define SARADC_INPUT_SRC_MSK	0x7
+#define SARADC_POWER_CTRL	BIT(3)
+
 #define DTB_DIR			"rockchip/"
 
 struct rg3xx_model {
@@ -50,6 +62,7 @@ enum rgxx3_device_id {
 	RGB30,
 	RK2023,
 	RGARCD,
+	RGB10MAX3,
 	/* Devices with duplicate ADC value */
 	RG353PS,
 	RG353VS,
@@ -107,6 +120,13 @@ static const struct rg3xx_model rg3xx_model_details[] = {
 		.fdtfile = DTB_DIR "rk3566-anbernic-rg-arc-d.dtb",
 		.detect_panel = 0,
 	},
+	[RGB10MAX3] = {
+		.adc_value = 765, /* Observed average from device */
+		.board = "rk3566-powkiddy-rgb10max3",
+		.board_name = "Powkiddy RGB10MAX3",
+		.fdtfile = DTB_DIR "rk3566-powkiddy-rgb10max3.dtb",
+		.detect_panel = 0,
+	},
 	/* Devices with duplicate ADC value */
 	[RG353PS] = {
 		.adc_value = 860, /* Observed average from device */
@@ -150,11 +170,63 @@ static const struct rg353_panel rg353_panel_details[] = {
 };
 
 /*
+ * The device has internal eMMC, and while some devices have an exposed
+ * clk pin you can ground to force a bypass not all devices do. As a
+ * result it may be possible for some devices to become a perma-brick
+ * if a corrupted TPL or SPL stage with a valid header is flashed to
+ * the internal eMMC. Add functionality to read ADC channel 0 (the func
+ * button) as early as possible in the boot process to provide some
+ * protection against this. If we ever get an open TPL stage, we should
+ * consider moving this function there.
+ */
+void read_func_button(void)
+{
+	int ret;
+	u32 reg;
+
+	/* Turn off SARADC to reset it. */
+	writel(0, (SARADC_BASE + SARADC_CTRL));
+
+	/* Enable channel 0 and power on SARADC. */
+	writel(((0 & SARADC_INPUT_SRC_MSK) | SARADC_POWER_CTRL),
+	       (SARADC_BASE + SARADC_CTRL));
+
+	/*
+	 * Wait for data to be ready. Use timeout of 20000us from
+	 * rockchip_saradc driver.
+	 */
+	ret = readl_poll_timeout((SARADC_BASE + SARADC_STAS), reg,
+				 !(reg & SARADC_ADC_STATUS), 20000);
+	if (ret) {
+		printf("ADC Timeout");
+		return;
+	}
+
+	/* Read the data from the SARADC. */
+	reg = readl((SARADC_BASE + SARADC_DATA));
+
+	/* Turn the SARADC back off so it's ready to be used again. */
+	writel(0, (SARADC_BASE + SARADC_CTRL));
+
+	/*
+	 * If the value is less than 30 the button is being pressed.
+	 * Reset the device back into Rockchip download mode.
+	 */
+	if (reg <= 30) {
+		printf("download key pressed, entering download mode...");
+		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		do_reset(NULL, 0, 0, NULL);
+	}
+};
+
+/*
  * Start LED very early so user knows device is on. Set color
  * to red.
  */
 void spl_board_init(void)
 {
+	read_func_button();
+
 	/* Set GPIO0_C5, GPIO0_C6, and GPIO0_C7 to output. */
 	writel(GPIO_WRITEMASK(GPIO_C7 | GPIO_C6 | GPIO_C5) | \
 	       (GPIO_C7 | GPIO_C6 | GPIO_C5),
diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c
index eb7a322d847..10398e7f712 100644
--- a/board/elgin/elgin_rv1108/elgin_rv1108.c
+++ b/board/elgin/elgin_rv1108/elgin_rv1108.c
@@ -8,7 +8,6 @@
 #include <init.h>
 #include <syscon.h>
 #include <asm/global_data.h>
-#include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/grf_rv1108.h>
 #include <asm/arch-rockchip/hardware.h>
diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
index bdf3cc03dc5..99a52a77116 100644
--- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c
+++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
@@ -5,7 +5,6 @@
 
 #include <common.h>
 #include <adc.h>
-#include <asm/io.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <linux/bitops.h>
diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS b/board/firefly/roc-pc-rk3399/MAINTAINERS
index 68a5b757d1d..2c0de4432fa 100644
--- a/board/firefly/roc-pc-rk3399/MAINTAINERS
+++ b/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -6,3 +6,4 @@ F:	board/firefly/roc-pc-rk3399
 F:	include/configs/roc-pc-rk3399.h
 F:	configs/roc-pc-rk3399_defconfig
 F:	configs/roc-pc-mezzanine-rk3399_defconfig
+F:	arch/arm/dts/rk3399-roc-pc*
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index 93e7d776fb2..590519b32af 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -9,32 +9,12 @@
 #include <log.h>
 #include <spl_gpio.h>
 #include <asm/io.h>
-#include <power/regulator.h>
 
 #include <asm/arch-rockchip/cru.h>
 #include <asm/arch-rockchip/gpio.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 
-#ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-	struct udevice *regulator;
-	int ret;
-
-	ret = regulator_get_by_platname("vcc5v0_host", &regulator);
-	if (ret) {
-		debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
-		goto out;
-	}
-
-	ret = regulator_set_enable(regulator, true);
-	if (ret)
-		debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
-out:
-	return 0;
-}
-
-#else
+#ifdef CONFIG_SPL_BUILD
 
 #define PMUGRF_BASE	0xff320000
 #define GPIO0_BASE	0xff720000
diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
index fbcf845e87d..e08cb42c27e 100644
--- a/board/google/gru/gru.c
+++ b/board/google/gru/gru.c
@@ -3,20 +3,9 @@
  * Copyright 2018 Google
  */
 
-#include <common.h>
 #include <dm.h>
 #include <init.h>
-#include <syscon.h>
-#include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/hardware.h>
-#include <asm/arch-rockchip/misc.h>
-
-#define GRF_IO_VSEL_BT656_SHIFT 0
-#define GRF_IO_VSEL_AUDIO_SHIFT 1
-#define PMUGRF_CON0_VSEL_SHIFT 8
-#define PMUGRF_CON0_VOL_SHIFT 9
 
 #ifdef CONFIG_SPL_BUILD
 /* provided to defeat compiler optimisation in board_init_f() */
@@ -65,44 +54,3 @@ int board_early_init_r(void)
 	return 0;
 }
 #endif
-
-static void setup_iodomain(void)
-{
-	struct rk3399_grf_regs *grf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	struct rk3399_pmugrf_regs *pmugrf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-	/* BT656 and audio is in 1.8v domain */
-	rk_setreg(&grf->io_vsel, (1 << GRF_IO_VSEL_BT656_SHIFT |
-				  1 << GRF_IO_VSEL_AUDIO_SHIFT));
-
-	/*
-	 * Set GPIO1 1.8v/3.0v source select to PMU1830_VOL
-	 * and explicitly configure that PMU1830_VOL to be 1.8V
-	 */
-	rk_setreg(&pmugrf->soc_con0, (1 << PMUGRF_CON0_VSEL_SHIFT |
-				      1 << PMUGRF_CON0_VOL_SHIFT));
-}
-
-int misc_init_r(void)
-{
-	const u32 cpuid_offset = 0x7;
-	const u32 cpuid_length = 0x10;
-	u8 cpuid[cpuid_length];
-	int ret;
-
-	setup_iodomain();
-
-	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
-	if (ret)
-		return ret;
-
-	ret = rockchip_cpuid_set(cpuid, cpuid_length);
-	if (ret)
-		return ret;
-
-	ret = rockchip_setup_macaddr();
-
-	return ret;
-}
diff --git a/board/pine64/pinebook-pro-rk3399/MAINTAINERS b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
index 7300ca1b1b8..2cafd1a41e5 100644
--- a/board/pine64/pinebook-pro-rk3399/MAINTAINERS
+++ b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
@@ -1,8 +1,8 @@
 PINEBOOK_PRO
 M:	Peter Robinson <pbrobinson@gmail.com>
+R:	Jonas Karlman <jonas@kwiboo.se>
 S:	Maintained
 F:	board/pine64/pinebook-pro-rk3399/
-F:	include/configs/rk3399-pinebook-pro.h
-F:	arch/arm/dts/rk3399-pinebook-pro.dts
-F:	arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
+F:	include/configs/pinebook-pro-rk3399.h
+F:	arch/arm/dts/rk3399-pinebook-pro*
 F:	configs/pinebook-pro-rk3399_defconfig
diff --git a/board/pine64/pinebook-pro-rk3399/Makefile b/board/pine64/pinebook-pro-rk3399/Makefile
deleted file mode 100644
index 2f692a12a67..00000000000
--- a/board/pine64/pinebook-pro-rk3399/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-y	+= pinebook-pro-rk3399.o
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
deleted file mode 100644
index 4ad780767ea..00000000000
--- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
+++ /dev/null
@@ -1,76 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2020 Peter Robinson <pbrobinson at gmail.com>
- */
-
-#include <common.h>
-#include <dm.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/hardware.h>
-#include <asm/arch-rockchip/misc.h>
-#include <linux/printk.h>
-#include <power/regulator.h>
-
-#define GRF_IO_VSEL_BT565_SHIFT 0
-#define PMUGRF_CON0_VSEL_SHIFT 8
-
-#ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-	struct udevice *regulator;
-	int ret;
-
-	ret = regulator_get_by_platname("vcc5v0_usb", &regulator);
-	if (ret) {
-		pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
-		goto out;
-	}
-
-	ret = regulator_set_enable(regulator, true);
-	if (ret)
-		pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret);
-
-out:
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_MISC_INIT_R
-static void setup_iodomain(void)
-{
-	struct rk3399_grf_regs *grf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	struct rk3399_pmugrf_regs *pmugrf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-	/* BT565 is in 1.8v domain */
-	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
-
-	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
-	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
-}
-
-int misc_init_r(void)
-{
-	const u32 cpuid_offset = 0x7;
-	const u32 cpuid_length = 0x10;
-	u8 cpuid[cpuid_length];
-	int ret;
-
-	setup_iodomain();
-
-	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
-	if (ret)
-		return ret;
-
-	ret = rockchip_cpuid_set(cpuid, cpuid_length);
-	if (ret)
-		return ret;
-
-	return ret;
-}
-#endif
diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
index bc2dcdd8d42..959566a877e 100644
--- a/board/pine64/pinephone-pro-rk3399/MAINTAINERS
+++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
@@ -2,7 +2,6 @@ PINEPHONE_PRO
 M:	Peter Robinson <pbrobinson@gmail.com>
 S:	Maintained
 F:	board/pine64/pinephone-pro-rk3399/
-F:	include/configs/rk3399-pinephone-pro.h
-F:	arch/arm/dts/rk3399-pinephone-pro.dts
-F:	arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+F:	include/configs/pinephone-pro-rk3399.h
+F:	arch/arm/dts/rk3399-pinephone-pro*
 F:	configs/pinephone-pro-rk3399_defconfig
diff --git a/board/pine64/pinephone-pro-rk3399/Makefile b/board/pine64/pinephone-pro-rk3399/Makefile
deleted file mode 100644
index 8d9203053e5..00000000000
--- a/board/pine64/pinephone-pro-rk3399/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-y	+= pinephone-pro-rk3399.o
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
deleted file mode 100644
index b6ccbb9c1c4..00000000000
--- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+++ /dev/null
@@ -1,78 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2022 Peter Robinson <pbrobinson at gmail.com>
- */
-
-#include <common.h>
-#include <dm.h>
-#include <init.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/hardware.h>
-#include <asm/arch-rockchip/misc.h>
-#include <power/regulator.h>
-
-#define GRF_IO_VSEL_BT565_GPIO2AB 1
-#define GRF_IO_VSEL_AUDIO_GPIO3D4A 2
-#define PMUGRF_CON0_VSEL_SHIFT 8
-
-#ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-	struct udevice *regulator;
-	int ret;
-
-	ret = regulator_get_by_platname("vcc5v0_usb", &regulator);
-	if (ret) {
-		pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
-		goto out;
-	}
-
-	ret = regulator_set_enable(regulator, true);
-	if (ret)
-		pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret);
-
-out:
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_MISC_INIT_R
-static void setup_iodomain(void)
-{
-	struct rk3399_grf_regs *grf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	struct rk3399_pmugrf_regs *pmugrf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-	/* BT565 is in 1.8v domain */
-	rk_setreg(&grf->io_vsel,
-		  GRF_IO_VSEL_BT565_GPIO2AB | GRF_IO_VSEL_AUDIO_GPIO3D4A);
-
-	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
-	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
-}
-
-int misc_init_r(void)
-{
-	const u32 cpuid_offset = 0x7;
-	const u32 cpuid_length = 0x10;
-	u8 cpuid[cpuid_length];
-	int ret;
-
-	setup_iodomain();
-
-	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
-	if (ret)
-		return ret;
-
-	ret = rockchip_cpuid_set(cpuid, cpuid_length);
-	if (ret)
-		return ret;
-
-	return ret;
-}
-#endif
diff --git a/board/pine64/quartz64_rk3566/MAINTAINERS b/board/pine64/quartz64_rk3566/MAINTAINERS
index 6b75b35a124..37b8c1eb78b 100644
--- a/board/pine64/quartz64_rk3566/MAINTAINERS
+++ b/board/pine64/quartz64_rk3566/MAINTAINERS
@@ -21,3 +21,14 @@ F:	arch/arm/dts/rk3566-soquartz-cm4.dts
 F:	arch/arm/dts/rk3566-soquartz-cm4-u-boot.dtsi
 F:	arch/arm/dts/rk3566-soquartz-model-a.dts
 F:	arch/arm/dts/rk3566-soquartz-model-a-u-boot.dtsi
+
+PINETAB2-RK3566
+M:	Jonas Karlman <jonas@kwiboo.se>
+S:	Maintained
+F:	configs/pinetab2-rk3566_defconfig
+F:	arch/arm/dts/rk3566-pinetab2.dtsi
+F:	arch/arm/dts/rk3566-pinetab2-u-boot.dtsi
+F:	arch/arm/dts/rk3566-pinetab2-v0.1.dts
+F:	arch/arm/dts/rk3566-pinetab2-v0.1-u-boot.dtsi
+F:	arch/arm/dts/rk3566-pinetab2-v2.0.dts
+F:	arch/arm/dts/rk3566-pinetab2-v2.0-u-boot.dtsi
diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS b/board/pine64/rockpro64_rk3399/MAINTAINERS
index 220ee21f230..42084aef0eb 100644
--- a/board/pine64/rockpro64_rk3399/MAINTAINERS
+++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
@@ -1,7 +1,8 @@
 ROCKPRO64
 M:	Jagan Teki <jagan@amarulasolutions.com>
+R:	Jonas Karlman <jonas@kwiboo.se>
 S:	Maintained
 F:	board/pine64/rockpro64_rk3399
 F:	include/configs/rockpro64_rk3399.h
-F:	arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+F:	arch/arm/dts/rk3399-rockpro64*
 F:	configs/rockpro64-rk3399_defconfig
diff --git a/board/pine64/rockpro64_rk3399/Makefile b/board/pine64/rockpro64_rk3399/Makefile
deleted file mode 100644
index b015c47e6fa..00000000000
--- a/board/pine64/rockpro64_rk3399/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# (C) Copyright 2019 Vasily Khoruzhick
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-obj-y	+= rockpro64-rk3399.o
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
deleted file mode 100644
index d79084614f1..00000000000
--- a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
+++ /dev/null
@@ -1,56 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2019 Vasily Khoruzhick <anarsoul@gmail.com>
- */
-
-#include <common.h>
-#include <dm.h>
-#include <init.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/hardware.h>
-#include <asm/arch-rockchip/misc.h>
-
-#define GRF_IO_VSEL_BT565_SHIFT 0
-#define PMUGRF_CON0_VSEL_SHIFT 8
-
-#ifdef CONFIG_MISC_INIT_R
-static void setup_iodomain(void)
-{
-	struct rk3399_grf_regs *grf =
-	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	struct rk3399_pmugrf_regs *pmugrf =
-	    syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-	/* BT565 is in 1.8v domain */
-	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
-
-	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
-	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
-}
-
-int misc_init_r(void)
-{
-	const u32 cpuid_offset = 0x7;
-	const u32 cpuid_length = 0x10;
-	u8 cpuid[cpuid_length];
-	int ret;
-
-	setup_iodomain();
-
-	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
-	if (ret)
-		return ret;
-
-	ret = rockchip_cpuid_set(cpuid, cpuid_length);
-	if (ret)
-		return ret;
-
-	ret = rockchip_setup_macaddr();
-
-	return ret;
-}
-
-#endif
diff --git a/board/radxa/rockpi4-rk3399/Kconfig b/board/radxa/rockpi4-rk3399/Kconfig
new file mode 100644
index 00000000000..d82663506b1
--- /dev/null
+++ b/board/radxa/rockpi4-rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCKPI4_RK3399
+
+config SYS_BOARD
+	default "rockpi4-rk3399"
+
+config SYS_VENDOR
+	default "radxa"
+
+config SYS_CONFIG_NAME
+	default "rockpi4-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/radxa/rockpi4-rk3399/MAINTAINERS b/board/radxa/rockpi4-rk3399/MAINTAINERS
new file mode 100644
index 00000000000..da5273fb9a3
--- /dev/null
+++ b/board/radxa/rockpi4-rk3399/MAINTAINERS
@@ -0,0 +1,22 @@
+ROCK-PI-4
+M:	Jagan Teki <jagan@amarulasolutions.com>
+R:	Jonas Karlman <jonas@kwiboo.se>
+S:	Maintained
+F:	board/radxa/rockpi4-rk3399/
+F:	configs/rock-pi-4-rk3399_defconfig
+F:	configs/rock-pi-4c-rk3399_defconfig
+F:	arch/arm/dts/rk3399-rock-pi-4*
+
+ROCK-4C+
+M:	FUKAUMI Naoki <naoki@radxa.com>
+R:	Jonas Karlman <jonas@kwiboo.se>
+S:	Maintained
+F:	configs/rock-4c-plus-rk3399_defconfig
+F:	arch/arm/dts/rk3399-rock-4c-plus*
+
+ROCK-4SE
+M:	Christopher Obbard <chris.obbard@collabora.com>
+R:	Jonas Karlman <jonas@kwiboo.se>
+S:	Maintained
+F:	configs/rock-4se-rk3399_defconfig
+F:	arch/arm/dts/rk3399-rock-4se*
diff --git a/board/rockchip/evb_rk3399/Makefile b/board/radxa/rockpi4-rk3399/Makefile
index aaa51c212e5..3d022533227 100644
--- a/board/rockchip/evb_rk3399/Makefile
+++ b/board/radxa/rockpi4-rk3399/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y	+= evb-rk3399.o
+obj-y	+= rockpi4-rk3399.o
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c
index 3c773d0930c..a533128b92f 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c
@@ -3,14 +3,8 @@
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  */
 
-#include <common.h>
 #include <dm.h>
 #include <efi_loader.h>
-#include <init.h>
-#include <log.h>
-#include <asm/arch-rockchip/periph.h>
-#include <linux/kernel.h>
-#include <power/regulator.h>
 
 #define ROCKPI4_UPDATABLE_IMAGES	2
 
@@ -25,36 +19,15 @@ struct efi_capsule_update_info update_info = {
 #endif
 
 #ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-	struct udevice *regulator;
-	int ret;
-
-	ret = regulator_get_by_platname("vcc5v0_host", &regulator);
-	if (ret) {
-		debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
-		goto out;
-	}
-
-	ret = regulator_set_enable(regulator, true);
-	if (ret)
-		debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
-
-out:
-	return 0;
-}
-
-#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && IS_ENABLED(CONFIG_EFI_PARTITION)
 static bool board_is_rockpi_4b(void)
 {
-	return CONFIG_IS_ENABLED(TARGET_EVB_RK3399) &&
-		of_machine_is_compatible("radxa,rockpi4b");
+	return of_machine_is_compatible("radxa,rockpi4b");
 }
 
 static bool board_is_rockpi_4c(void)
 {
-	return CONFIG_IS_ENABLED(TARGET_EVB_RK3399) &&
-		of_machine_is_compatible("radxa,rockpi4c");
+	return of_machine_is_compatible("radxa,rockpi4c");
 }
 
 void rockchip_capsule_update_board_setup(void)
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 5fc114a63f6..675b72dd060 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -4,17 +4,21 @@ S:      Maintained
 F:      board/rockchip/evb_rk3328
 F:      include/configs/evb_rk3328.h
 F:      configs/evb-rk3328_defconfig
+F:      arch/arm/dts/rk3328-evb.dts
+F:      arch/arm/dts/rk3328-evb-u-boot.dtsi
 
 NANOPI-R2C-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/nanopi-r2c-rk3328_defconfig
+F:      arch/arm/dts/rk3328-nanopi-r2c.dts
 F:      arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
 
 NANOPI-R2C-PLUS-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/nanopi-r2c-plus-rk3328_defconfig
+F:      arch/arm/dts/rk3328-nanopi-r2c-plus.dts
 F:      arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
 
 NANOPI-R2S-RK3328
@@ -28,29 +32,36 @@ ORANGEPI-R1-PLUS-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/orangepi-r1-plus-rk3328_defconfig
+F:      arch/arm/dts/rk3328-orangepi-r1-plus.dts
 F:      arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
 
 ORANGEPI-R1-PLUS-LTS-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/orangepi-r1-plus-lts-rk3328_defconfig
+F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
 F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
 
 ROC-RK3328-CC
 M:      Loic Devulder <ldevulder@suse.com>
 M:      Chen-Yu Tsai <wens@csie.org>
+R:      Jonas Karlman <jonas@kwiboo.se>
 S:      Maintained
 F:      configs/roc-cc-rk3328_defconfig
+F:      arch/arm/dts/rk3328-roc-cc.dts
 F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
 
 ROCK64-RK3328
 M:      Matwey V. Kornilov <matwey.kornilov@gmail.com>
+R:      Jonas Karlman <jonas@kwiboo.se>
 S:      Maintained
 F:      configs/rock64-rk3328_defconfig
+F:      arch/arm/dts/rk3328-rock64.dts
 F:      arch/arm/dts/rk3328-rock64-u-boot.dtsi
 
 ROCKPIE-RK3328
 M:      Banglang Huang <banglang.huang@foxmail.com>
+R:      Jonas Karlman <jonas@kwiboo.se>
 S:      Maintained
 F:      configs/rock-pi-e-rk3328_defconfig
 F:      arch/arm/dts/rk3328-rock-pi-e.dts
diff --git a/board/rockchip/evb_rk3328/README b/board/rockchip/evb_rk3328/README
deleted file mode 100644
index 6cbb66a4cf8..00000000000
--- a/board/rockchip/evb_rk3328/README
+++ /dev/null
@@ -1,70 +0,0 @@
-Introduction
-============
-
-RK3328 key features we might use in U-Boot:
-* CPU: ARMv8 64bit quad-core Cortex-A53
-* IRAM: 36KB
-* DRAM: 4GB-16MB dual-channel
-* eMMC: support eMMC 5.0/5.1, suport HS400, HS200, DDR50
-* SD/MMC: support SD 3.0, MMC 4.51
-* USB: USB2.0 EHCI host port *2
-* Display: RGB/HDMI/DP/MIPI/EDP
-
-evb key features:
-* regulator: pwm regulator for CPU B/L
-* PMIC: rk808
-* debug console: UART2
-
-In order to support Arm Trust Firmware(ATF), we need to use the
-miniloader from rockchip which:
-* do DRAM init
-* load and verify ATF image
-* load and verify U-Boot image
-
-Here is the step-by-step to boot to U-Boot on rk3328.
-
-Get the Source and prebuild binary
-==================================
-
-  > mkdir ~/evb_rk3328
-  > cd ~/evb_rk3328
-  > git clone https://github.com/ARM-software/arm-trusted-firmware.git
-  > git clone https://github.com/rockchip-linux/rkbin
-  > git clone https://github.com/rockchip-linux/rkflashtool
-
-Compile ATF
-===============
-
-  > cd arm-trusted-firmware
-  > make realclean
-  > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328 bl31
-
-Compile U-Boot
-==================
-
-  > cd ../u-boot
-  > make CROSS_COMPILE=aarch64-linux-gnu- evb-rk3328_defconfig all
-
-Compile rkflashtool
-=======================
-
-  > cd ../rkflashtool
-  > make
-
-Package image for miniloader
-================================
-  > cd ..
-  > cp arm-trusted-firmware/build/rk3328/release/bl31.bin rkbin/rk33
-  > ./rkbin/tools/trust_merger rkbin/tools/RK3328TRUST.ini
-  > ./rkbin/tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img
-  > mkdir image
-  > mv trust.img ./image/
-  > mv uboot.img ./image/rk3328evb-uboot.bin
-
-Flash image
-===============
-Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
-
-  > ./rkflashtool/rkflashloader rk3328evb
-
-You should be able to get U-Boot log message in console/UART2 now.
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
index acdb840f209..8dab3fa70f5 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -4,48 +4,53 @@ S:      Maintained
 F:      board/rockchip/evb_rk3399
 F:      include/configs/evb_rk3399.h
 F:      configs/evb-rk3399_defconfig
+F:      arch/arm/dts/rk3399-evb*
 F:      configs/firefly-rk3399_defconfig
+F:      arch/arm/dts/rk3399-firefly*
 
 EAIDK-610
 M:      Andy Yan <andy.yan@rock-chips.com>
 S:      Maintained
 F:	configs/eaidk-610-rk3399_defconfig
-F:	arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi
+F:	arch/arm/dts/rk3399-eaidk-610*
 
 KHADAS-EDGE
 M:	Nick Xie <nick@khadas.com>
 S:	Maintained
 F:	configs/khadas-edge-rk3399_defconfig
+F:	arch/arm/dts/rk3399-khadas-edge.dts
+F:	arch/arm/dts/rk3399-khadas-edge.dtsi
 F:	arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi
 
 KHADAS-EDGE-CAPTAIN
 M:	Nick Xie <nick@khadas.com>
 S:	Maintained
 F:	configs/khadas-edge-captain-rk3399_defconfig
-F:	arch/arm/dts/rk3399-khadas-edge-captain-u-boot.dtsi
+F:	arch/arm/dts/rk3399-khadas-edge-captain*
 
 KHADAS-EDGE-V
 M:	Nick Xie <nick@khadas.com>
 S:	Maintained
 F:	configs/khadas-edge-v-rk3399_defconfig
-F:	arch/arm/dts/rk3399-khadas-edge-v-u-boot.dtsi
+F:	arch/arm/dts/rk3399-khadas-edge-v*
 
 LEEZ-P710
 M:	Andy Yan <andy.yan@rock-chips.com>
 S:      Maintained
-F:	arch/arm/dts/rk3399-leez-p710-u-boot.dtsi
+F:	arch/arm/dts/rk3399-leez-p710*
 F:	configs/leez-rk3399_defconfig
 
 NANOPC-T4
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
 F:	configs/nanopc-t4-rk3399_defconfig
-F:	arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
+F:	arch/arm/dts/rk3399-nanopc-t4*
 
 NANOPI-M4
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
 F:	configs/nanopi-m4-rk3399_defconfig
+F:	arch/arm/dts/rk3399-nanopi-m4.dts
 F:	arch/arm/dts/rk3399-nanopi-m4-u-boot.dtsi
 
 NANOPI-M4-2GB
@@ -53,55 +58,34 @@ M:	Jagan Teki <jagan@amarulasolutions.com>
 M:	Deepak Das <deepakdas.linux@gmail.com>
 S:	Maintained
 F:	configs/nanopi-m4-2gb-rk3399_defconfig
-F:	arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi
+F:	arch/arm/dts/rk3399-nanopi-m4-2gb*
 
 NANOPI-M4B
 M:	Alexandre Vicenzi <linux@alxd.me>
 S:	Maintained
 F:	configs/nanopi-m4b-rk3399_defconfig
-F:	arch/arm/dts/rk3399-nanopi-m4b-u-boot.dtsi
+F:	arch/arm/dts/rk3399-nanopi-m4b*
 
 NANOPI-NEO4
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
 F:	configs/nanopi-neo4-rk3399_defconfig
-F:	arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi
+F:	arch/arm/dts/rk3399-nanopi-neo4*
 
 NANOPI-R4S
 M:	Xiaobo Tian <peterwillcn@gmail.com>
 S:	Maintained
 F:	configs/nanopi-r4s-rk3399_defconfig
-F:	arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
+F:	arch/arm/dts/rk3399-nanopi-r4s*
 
 ORANGEPI-RK3399
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
 F:	configs/orangepi-rk3399_defconfig
-F:	arch/arm/dts/rk3399-u-boot.dtsi
-F:	arch/arm/dts/rk3399-orangepi-u-boot.dtsi
-
-ROCK-4C+
-M:	FUKAUMI Naoki <naoki@radxa.com>
-S:	Maintained
-F:	configs/rock-4c-plus-rk3399_defconfig
-F:	arch/arm/dts/rk3399-rock-4c-plus.dts
-
-ROCK-4SE
-M:	Christopher Obbard <chris.obbard@collabora.com>
-S:	Maintained
-F:	configs/rock-4se-rk3399_defconfig
-F:	arch/arm/dts/rk3399-rock-4se-u-boot.dtsi
-
-ROCK-PI-4
-M:	Jagan Teki <jagan@amarulasolutions.com>
-S:	Maintained
-F:	configs/rock-pi-4-rk3399_defconfig
-F:	arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
-F:	configs/rock-pi-4c-rk3399_defconfig
-F:	arch/arm/dts/rk3399-rock-pi-4c-u-boot.dtsi
+F:	arch/arm/dts/rk3399-orangepi*
 
 ROCK-PI-N10
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
 F:	configs/rock-pi-n10-rk3399pro_defconfig
-F:	arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi
+F:	arch/arm/dts/rk3399pro-rock-pi-n10*
diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS
index 2bd44bc5872..a858ab163f3 100644
--- a/board/rockchip/evb_rk3588/MAINTAINERS
+++ b/board/rockchip/evb_rk3588/MAINTAINERS
@@ -1,3 +1,18 @@
+COOLPI-4B-RK3588S
+M:	Andy Yan <andyshrk@163.com>
+S:	Maintained
+F:	configs/coolpi-4b-rk3588s_defconfig
+F:	arch/arm/dts/rk3588s-coolpi-4b.dts
+F:	arch/arm/dts/rk3588s-coolpi-u-boot.dtsi
+
+COOLPI-CM5-EVB-RK3588
+M:	Andy Yan <andyshrk@163.com>
+S:	Maintained
+F:	configs/coolpi-cm5-evb-rk3588_defconfig
+F:	arch/arm/dts/rk3588-coolpi-cm5.dtsi
+F:	arch/arm/dts/rk3588-coolpi-cm5-evb.dts
+F:	arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
+
 EVB-RK3588
 M:	Kever Yang <kever.yang@rock-chips.com>
 S:	Maintained
@@ -7,6 +22,13 @@ F:	configs/evb-rk3588_defconfig
 F:	arch/arm/dts/rk3588-evb1-v10.dts
 F:	arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi
 
+GENERIC-RK3588
+M:	Jonas Karlman <jonas@kwiboo.se>
+S:	Maintained
+F:	configs/generic-rk3588_defconfig
+F:	arch/arm/dts/rk3588-generic.dts
+F:	arch/arm/dts/rk3588-generic-u-boot.dtsi
+
 ORANGEPI-5-RK3588
 M:	Jonas Karlman <jonas@kwiboo.se>
 S:	Maintained
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c
index e6ac598648d..0d7a486bed7 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -8,7 +8,6 @@
 #include <init.h>
 #include <syscon.h>
 #include <asm/global_data.h>
-#include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/grf_rv1108.h>
 #include <asm/arch-rockchip/hardware.h>
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index f85209c6498..eff3a00c30a 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -11,8 +11,6 @@
 #include <init.h>
 #include <net.h>
 #include <netdev.h>
-#include <asm/arch-rockchip/bootrom.h>
-#include <asm/io.h>
 
 static int get_ethaddr_from_eeprom(u8 *addr)
 {
@@ -38,13 +36,3 @@ int rk3288_board_late_init(void)
 
 	return 0;
 }
-
-int mmc_get_env_dev(void)
-{
-	u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
-
-	if (bootdevice_brom_id == BROM_BOOTSOURCE_EMMC)
-		return 0;
-
-	return 1;
-}
diff --git a/board/rockchip/toybrick_rk3588/Kconfig b/board/rockchip/toybrick_rk3588/Kconfig
new file mode 100644
index 00000000000..8e781a18d9d
--- /dev/null
+++ b/board/rockchip/toybrick_rk3588/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_TOYBRICK_RK3588
+
+config SYS_BOARD
+	default "toybrick_rk3588"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "toybrick_rk3588"
+
+endif
diff --git a/board/rockchip/toybrick_rk3588/MAINTAINERS b/board/rockchip/toybrick_rk3588/MAINTAINERS
new file mode 100644
index 00000000000..cd4401c24f3
--- /dev/null
+++ b/board/rockchip/toybrick_rk3588/MAINTAINERS
@@ -0,0 +1,8 @@
+TOYBRICK-RK3588
+M:	Elon Zhang <zhangzj@rock-chips.com>
+S:	Maintained
+F:	board/rockchip/toybrick_rk3588
+F:	include/configs/toybrick_rk3588.h
+F:	configs/toybrick-rk3588_defconfig
+F:	arch/arm/dts/rk3588-toybrick-x0.dts
+F:	arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi
diff --git a/board/rockchip/toybrick_rk3588/Makefile b/board/rockchip/toybrick_rk3588/Makefile
new file mode 100644
index 00000000000..75d4d9438f7
--- /dev/null
+++ b/board/rockchip/toybrick_rk3588/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier:     GPL-2.0+
+#
+# Copyright (c) 2024 Rockchip Electronics Co,. Ltd.
+#
+
+obj-y += toybrick-rk3588.o
diff --git a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c b/board/rockchip/toybrick_rk3588/toybrick-rk3588.c
new file mode 100644
index 00000000000..e3217f70b50
--- /dev/null
+++ b/board/rockchip/toybrick_rk3588/toybrick-rk3588.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024 Rockchip Electronics Co,. Ltd.
+ */
+
+#include <fdtdec.h>
+#include <fdt_support.h>
+
+#ifdef CONFIG_OF_BOARD_SETUP
+static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob)
+{
+	struct fdt_memory gap1 = {
+		.start = 0x3fc000000,
+		.end = 0x3fc4fffff,
+	};
+	struct fdt_memory gap2 = {
+		.start = 0x3fff00000,
+		.end = 0x3ffffffff,
+	};
+	unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
+	int ret;
+
+	/*
+	 * Inject the reserved-memory nodes into the DTS
+	 */
+	ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1,  NULL, 0,
+					 NULL, flags);
+	if (ret)
+		return ret;
+
+	return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2,  NULL, 0,
+					  NULL, flags);
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+	return rk3588_add_reserved_memory_fdt_nodes(blob);
+}
+#endif
diff --git a/board/theobroma-systems/common/common.c b/board/theobroma-systems/common/common.c
index 864bcdd46f8..585da438845 100644
--- a/board/theobroma-systems/common/common.c
+++ b/board/theobroma-systems/common/common.c
@@ -89,36 +89,6 @@ int setup_boottargets(void)
 	return 0;
 }
 
-int mmc_get_env_dev(void)
-{
-	const char *boot_device =
-		ofnode_read_chosen_string("u-boot,spl-boot-device");
-	struct udevice *devp;
-
-	if (!boot_device) {
-		debug("%s: /chosen/u-boot,spl-boot-device not set\n",
-		      __func__);
-#ifdef CONFIG_SYS_MMC_ENV_DEV
-		return CONFIG_SYS_MMC_ENV_DEV;
-#else
-		return 0;
-#endif
-	}
-
-	debug("%s: booted from %s\n", __func__, boot_device);
-
-	if (uclass_find_device_by_ofnode(UCLASS_MMC, ofnode_path(boot_device), &devp))
-#ifdef CONFIG_SYS_MMC_ENV_DEV
-		return CONFIG_SYS_MMC_ENV_DEV;
-#else
-		return 0;
-#endif
-
-	debug("%s: get MMC ENV from mmc%d\n", __func__, devp->seq_);
-
-	return devp->seq_;
-}
-
 enum env_location arch_env_get_location(enum env_operation op, int prio)
 {
 	const char *boot_device =
diff --git a/board/theobroma-systems/jaguar_rk3588/Kconfig b/board/theobroma-systems/jaguar_rk3588/Kconfig
new file mode 100644
index 00000000000..0ff417af4dd
--- /dev/null
+++ b/board/theobroma-systems/jaguar_rk3588/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_JAGUAR_RK3588
+
+config SYS_BOARD
+	default "jaguar_rk3588"
+
+config SYS_VENDOR
+	default "theobroma-systems"
+
+config SYS_CONFIG_NAME
+	default "jaguar_rk3588"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select ENV_IS_NOWHERE
+
+endif
diff --git a/board/theobroma-systems/jaguar_rk3588/MAINTAINERS b/board/theobroma-systems/jaguar_rk3588/MAINTAINERS
new file mode 100644
index 00000000000..28fae4b479f
--- /dev/null
+++ b/board/theobroma-systems/jaguar_rk3588/MAINTAINERS
@@ -0,0 +1,13 @@
+JAGUAR-RK3588 (SBC-RK3588-AMR Single Board Computer)
+M:	Klaus Goger <klaus.goger@theobroma-systems.com>
+M:	Quentin Schulz <quentin.schulz@theobroma-systems.com>
+M:	Heiko Stuebner <heiko.stuebner@cherry.de>
+S:	Maintained
+F:	board/theobroma-systems/jaguar_rk3588
+F:	board/theobroma-systems/common
+F:	doc/board/theobroma-systems/
+F:	include/configs/jaguar_rk3588.h
+F:	arch/arm/dts/rk3588-jaguar*
+F:	configs/jaguar-rk3588_defconfig
+W:	https://theobroma-systems.com/product/jaguar-sbc-rk3588/
+T:	git git://git.theobroma-systems.com/jaguar-u-boot.git
diff --git a/board/theobroma-systems/jaguar_rk3588/Makefile b/board/theobroma-systems/jaguar_rk3588/Makefile
new file mode 100644
index 00000000000..532aab01532
--- /dev/null
+++ b/board/theobroma-systems/jaguar_rk3588/Makefile
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += jaguar_rk3588.o
+ifneq ($(CONFIG_SPL_BUILD),y)
+obj-y	+= ../common/common.o
+endif
diff --git a/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c b/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c
new file mode 100644
index 00000000000..a6d44f10db3
--- /dev/null
+++ b/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2023 Theobroma Systems Design und Consulting GmbH
+ */
+
+#include <phy.h>
+#include <eth_phy.h>
+
+#include <asm/types.h>
+#include <asm/arch-rockchip/cru_rk3588.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/ioc_rk3588.h>
+#include <asm-generic/u-boot.h>
+#include <dm/device.h>
+#include <dm/uclass-id.h>
+#include <linux/bitfield.h>
+
+#include "../common/common.h"
+
+#define GPIO2C3_SEL_MASK		GENMASK(15, 12)
+#define GPIO2C3_ETH0_REFCLKO_25M	FIELD_PREP(GPIO2C3_SEL_MASK, 1)
+
+#define REFCLKO25M_ETH0_OUT_SEL_MASK	BIT(15)
+#define REFCLKO25M_ETH0_OUT_SEL_CPLL	FIELD_PREP(REFCLKO25M_ETH0_OUT_SEL_MASK, 1)
+#define REFCLKO25M_ETH0_OUT_DIV_MASK	GENMASK(14, 8)
+#define REFCLKO25M_ETH0_OUT_DIV(x)	FIELD_PREP(REFCLKO25M_ETH0_OUT_DIV_MASK, (x) - 1)
+
+#define REFCLKO25M_ETH0_OUT_EN		BIT(4)
+
+void setup_eth0refclko(void)
+{
+	/* Configure and enable ETH0_REFCLKO_25MHz */
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+	static struct rk3588_cru * const cru = (void *)CRU_BASE;
+
+	/* 1. Pinmux */
+	rk_clrsetreg(&bus_ioc->gpio2c_iomux_sel_l, GPIO2C3_SEL_MASK, GPIO2C3_ETH0_REFCLKO_25M);
+	/* 2. Parent clock selection + divider => CPLL (1.5GHz) / 60 => 25MHz */
+	rk_clrsetreg(&cru->clksel_con[15],
+		     REFCLKO25M_ETH0_OUT_SEL_MASK | REFCLKO25M_ETH0_OUT_DIV_MASK,
+		     REFCLKO25M_ETH0_OUT_SEL_CPLL | REFCLKO25M_ETH0_OUT_DIV(60));
+	/* 3. Enable clock */
+	rk_clrreg(&cru->clkgate_con[5], REFCLKO25M_ETH0_OUT_EN);
+}
+
+int rockchip_early_misc_init_r(void)
+{
+	setup_boottargets();
+
+	setup_eth0refclko();
+
+	return 0;
+}
diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS
index 93f570fc4f9..7e84a5be262 100644
--- a/board/theobroma-systems/puma_rk3399/MAINTAINERS
+++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS
@@ -4,8 +4,9 @@ M:	Klaus Goger <klaus.goger@theobroma-systems.com>
 S:	Maintained
 F:	board/theobroma-systems/puma_rk3399
 F:	board/theobroma-systems/common
+F:	doc/board/theobroma-systems
 F:	include/configs/puma_rk3399.h
-F:	arch/arm/dts/rk3399-puma.dts
+F:	arch/arm/dts/rk3399-puma*
 F:	configs/puma-rk3399_defconfig
 W:	https://www.theobroma-systems.com/rk3399-q7/tech-specs
 T:	git git://git.theobroma-systems.com/puma-u-boot.git
diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README
index 649aa3c543d..39c9d618866 100644
--- a/board/theobroma-systems/puma_rk3399/README
+++ b/board/theobroma-systems/puma_rk3399/README
@@ -1,89 +1 @@
-Introduction
-============
-
-The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip
-RK3399 in a Qseven-compatible form-factor.
-
-RK3399-Q7 features:
-	* CPU: ARMv8 64bit Big-Little architecture,
-		* Big: dual-core Cortex-A72
-		* Little: quad-core Cortex-A53
-		* IRAM: 200KB
-	* DRAM: 4GB-128MB dual-channel
-	* eMMC: onboard eMMC
-	* SD/MMC
-	* GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY
-	* USB:
-		* USB3.0 dual role port
-		* 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub
-	* Display: HDMI/eDP/MIPI
-	* Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF)
-	* NOR Flash: onboard SPI NOR
-	* Companion Controller: onboard additional Cortex-M0 microcontroller
-		* RTC
-		* fan controller
-		* CAN
-
-Here is the step-by-step to boot to U-Boot on rk3399.
-
-Get the Source and build ATF binary
-===================================
-
-  > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
-
-Compile the ATF
-===============
-
-  > cd trusted-firmware-a
-  > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
-  > cp build/rk3399/release/bl31/bl31.elf ../u-boot/bl31.elf
-
-Compile the U-Boot
-==================
-
-  > cd ../u-boot
-  > make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all
-
-Flash the image
-===============
-
-Copy u-boot-rockchip.bin to offset 32k for SD/eMMC.
-Copy u-boot-rockchip-spi.bin to offset 0 for NOR-flash.
-
-SD-Card
--------
-
-  > dd if=u-boot-rockchip.bin of=/dev/sdb seek=64
-
-eMMC
-----
-
-rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
-help of the Rockchip loader binary.
-
-  > git clone https://github.com/rockchip-linux/rkdeveloptool
-  > cd rkdeveloptool
-  > autoreconf -i && ./configure && make
-  > git clone https://github.com/rockchip-linux/rkbin.git
-  > cd rkbin
-  > ./tools/boot_merger RKBOOT/RK3399MINIALL.ini
-  > cd ..
-  > ./rkdeveloptool db rkbin/rk3399_loader_v1.25.126.bin
-  > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
-
-NOR-Flash
----------
-
-rkdeveloptool allows to flash the on-board SPI via the USB OTG interface with
-help of the Rockchip loader binary.
-
-  > git clone https://github.com/rockchip-linux/rkdeveloptool
-  > cd rkdeveloptool
-  > autoreconf -i && ./configure && make
-  > git clone https://github.com/rockchip-linux/rkbin.git
-  > cd rkbin
-  > ./tools/boot_merger RKBOOT/RK3399MINIALL_SPINOR.ini
-  > cd ..
-  > ./rkdeveloptool db rkbin/rk3399_loader_spinor_v1.25.114.bin
-  > ./rkdeveloptool ef
-  > ./rkdeveloptool wl 0 ../u-boot-rockchip-spi.bin
+See doc/board/theobroma-systems/puma_rk3399.rst.
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index a82f97b2d54..eeb8a99231e 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -3,50 +3,10 @@
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */
 
-#include <dm.h>
-#include <syscon.h>
-#include <dm/pinctrl.h>
-#include <asm/io.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/hardware.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/misc.h>
 #include "../common/common.h"
 
-static void setup_iodomain(void)
+int rockchip_early_misc_init_r(void)
 {
-	const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3;
-	struct rk3399_grf_regs *grf =
-	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-	/*
-	 * Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6).
-	 * Linux assumes that PCIE_RST# works out of the box as it probes
-	 * PCIe before loading the iodomain driver.
-	 */
-	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
-}
-
-int misc_init_r(void)
-{
-	const u32 cpuid_offset = 0x7;
-	const u32 cpuid_length = 0x10;
-	u8 cpuid[cpuid_length];
-	int ret;
-
-	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
-	if (ret)
-		return ret;
-
-	ret = rockchip_cpuid_set(cpuid, cpuid_length);
-	if (ret)
-		return ret;
-
-	ret = rockchip_setup_macaddr();
-	if (ret)
-		return ret;
-
-	setup_iodomain();
 	setup_boottargets();
 
 	return 0;
diff --git a/board/theobroma-systems/ringneck_px30/MAINTAINERS b/board/theobroma-systems/ringneck_px30/MAINTAINERS
index 06e1beaab14..97baf334d02 100644
--- a/board/theobroma-systems/ringneck_px30/MAINTAINERS
+++ b/board/theobroma-systems/ringneck_px30/MAINTAINERS
@@ -4,7 +4,8 @@ M:	Klaus Goger <klaus.goger@theobroma-systems.com>
 S:	Maintained
 F:	board/theobroma-systems/ringneck_px30
 F:	board/theobroma-systems/common
+F:	doc/board/theobroma-systems/
 F:	include/configs/ringneck_px30.h
 F:	arch/arm/dts/px30-ringneck*
 F:	configs/ringneck-px30_defconfig
-W:	https://www.theobroma-systems.com/px30-uq7#tech-spec
+W:	https://theobroma-systems.com/product/ringneck-som-px30-uq7/
diff --git a/board/theobroma-systems/ringneck_px30/README b/board/theobroma-systems/ringneck_px30/README
index e756b3a8ffc..915baf4a9a0 100644
--- a/board/theobroma-systems/ringneck_px30/README
+++ b/board/theobroma-systems/ringneck_px30/README
@@ -1,69 +1 @@
-Introduction
-============
-
-The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, MXM-230
-connector) system-on-module from Theobroma Systems[1], featuring the
-Rockchip PX30.
-
-It provides the following feature set:
-  * up to 4GB DDR4
-  * up to 128GB on-module eMMC (with 8-bit 1.8V interface)
-  * SD card (on a baseboard) via edge connector
-  * Fast Ethernet with on-module TI DP83825I PHY
-  * MIPI-DSI/LVDS
-  * MIPI-CSI
-  * USB
-    - 1x USB 2.0 dual-role
-    - 3x USB 2.0 host
-  * on-module companion controller (STM32 Cortex-M0 or ATtiny), implementing:
-    - low-power RTC functionality (ISL1208 emulation)
-    - fan controller (AMC6821 emulation)
-    - USB<->CAN bridge controller (STM32 only)
-  * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
-  * on-module NXP SE05x Secure Element
-
-Here is the step-by-step to boot to U-Boot on px30.
-
-Get the Source and build ATF binary
-===================================
-
-  > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
-
-Compile the ATF
-===============
-
-  > cd trusted-firmware-a
-  > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=px30 bl31
-  > cp build/px30/release/bl31/bl31.elf ../u-boot/bl31.elf
-
-Compile the U-Boot
-==================
-
-  > cd ../u-boot
-  > make CROSS_COMPILE=aarch64-linux-gnu- ringneck-px30_defconfig all
-
-Flash the image
-===============
-
-Copy u-boot-rockchip.bin to offset 32k for SD/eMMC.
-
-SD-Card
--------
-
-  > dd if=u-boot-rockchip.bin of=/dev/sdb seek=64
-
-eMMC
-----
-
-rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
-help of the Rockchip loader binary.
-
-  > git clone https://github.com/rockchip-linux/rkdeveloptool
-  > cd rkdeveloptool
-  > autoreconf -i && ./configure && make
-  > git clone https://github.com/rockchip-linux/rkbin.git
-  > cd rkbin
-  > ./tools/boot_merger RKBOOT/PX30MINIALL.ini
-  > cd ..
-  > ./rkdeveloptool db rkbin/px30_loader_v1.16.131.bin
-  > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
+See doc/board/theobroma-systems/ringneck_px30.rst.
diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
index ff7e414303d..bfebfe5136d 100644
--- a/board/theobroma-systems/ringneck_px30/ringneck-px30.c
+++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
@@ -4,29 +4,11 @@
  */
 
 #include <asm/gpio.h>
-#include <asm/arch-rockchip/misc.h>
 #include <linux/delay.h>
 #include "../common/common.h"
 
-int misc_init_r(void)
+int rockchip_early_misc_init_r(void)
 {
-	const u32 cpuid_offset = 0x7;
-	const u32 cpuid_length = 0x10;
-	u8 cpuid[cpuid_length];
-	int ret;
-
-	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
-	if (ret)
-		return ret;
-
-	ret = rockchip_cpuid_set(cpuid, cpuid_length);
-	if (ret)
-		return ret;
-
-	ret = rockchip_setup_macaddr();
-	if (ret)
-		return ret;
-
 	setup_boottargets();
 
 	return 0;
diff --git a/board/vamrs/rock960_rk3399/MAINTAINERS b/board/vamrs/rock960_rk3399/MAINTAINERS
index 8821672a3ab..f2121b19145 100644
--- a/board/vamrs/rock960_rk3399/MAINTAINERS
+++ b/board/vamrs/rock960_rk3399/MAINTAINERS
@@ -4,8 +4,10 @@ S:      Maintained
 F:      board/vamrs/rock960_rk3399/
 F:      include/configs/rock960_rk3399.h
 F:      configs/rock960-rk3399_defconfig
+F:      arch/arm/dts/rk3399-rock960*
 
 FICUS EE
 M:      Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 S:      Maintained
 F:	configs/ficus-rk3399_defconfig
+F:	arch/arm/dts/rk3399-ficus*
diff --git a/board/vamrs/rock960_rk3399/Makefile b/board/vamrs/rock960_rk3399/Makefile
deleted file mode 100644
index 6c3e475b3a8..00000000000
--- a/board/vamrs/rock960_rk3399/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-#
-
-obj-y	+= rock960-rk3399.o
diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c
deleted file mode 100644
index a7fc38d42f8..00000000000
--- a/board/vamrs/rock960_rk3399/rock960-rk3399.c
+++ /dev/null
@@ -1,28 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- */
-
-#include <common.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/hardware.h>
-#include <linux/bitops.h>
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
-	struct rk3399_grf_regs *grf =
-	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-	/**
-	 * Some SSD's to work on rock960 would require explicit
-	 * domain voltage change, so BT565 is in 1.8v domain
-	 */
-	rk_setreg(&grf->io_vsel, BIT(0));
-
-	return 0;
-}
-#endif