diff options
| author | Tom Rini <trini@konsulko.com> | 2023-12-28 07:54:54 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-12-28 07:54:54 -0500 |
| commit | 64e47952f594e28b24a57d98c482a6e0be0268c6 (patch) | |
| tree | 37d605de8a369f27f76538e27fcc3b2e39d6120c /board | |
| parent | 4b151562bb8e54160adedbc6a1c0c749c00a2f84 (diff) | |
| parent | 9924d44dbcd47bd3664fa9f1f9f24044d83eaebf (diff) | |
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
- Andes: Enable Andes CPU memboost and ECC feature by default
- Sifive: Add private L2 cache driver
Diffstat (limited to 'board')
| -rw-r--r-- | board/AndesTech/ae350/ae350.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c index 772c6bf1ee3..4e53fee5d23 100644 --- a/board/AndesTech/ae350/ae350.c +++ b/board/AndesTech/ae350/ae350.c @@ -13,7 +13,9 @@ #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) #include <netdev.h> #endif +#include <asm/csr.h> #include <asm/global_data.h> +#include <asm/sbi.h> #include <linux/io.h> #include <faraday/ftsmc020.h> #include <fdtdec.h> @@ -27,6 +29,27 @@ DECLARE_GLOBAL_DATA_PTR; /* * Miscellaneous platform dependent initializations */ +#if IS_ENABLED(CONFIG_MISC_INIT_R) +int misc_init_r(void) +{ + long csr_marchid = 0; + const long mask_64 = 0x8000; + const long mask_cpu = 0xff; + char cpu_name[10] = {}; + +#if CONFIG_IS_ENABLED(RISCV_SMODE) + sbi_get_marchid(&csr_marchid); +#elif CONFIG_IS_ENABLED(RISCV_MMODE) + csr_marchid = csr_read(CSR_MARCHID); +#endif + if (mask_64 & csr_marchid) + snprintf(cpu_name, sizeof(cpu_name), "ax%lx", (mask_cpu & csr_marchid)); + else + snprintf(cpu_name, sizeof(cpu_name), "a%lx", (mask_cpu & csr_marchid)); + + return env_set("cpu", cpu_name); +} +#endif #if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL) #define ANDES_SPL_FDT_ADDR (CONFIG_TEXT_BASE - 0x100000) @@ -102,7 +125,8 @@ void *board_fdt_blob_setup(int *err) void spl_board_init() { /* enable v5l2 cache */ - enable_caches(); + if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) + enable_caches(); } #endif |
