global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*

The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
author: Tom Rini <trini@konsulko.com> 2022-11-16 13:10:37 -0500
committer: Tom Rini <trini@konsulko.com> 2022-12-05 16:06:07 -0500
commit: aa6e94deabb45154cea07ad44c4a5c047bca078b (patch)
tree: 1131ae8e3635f3d0c91f8df892ab05e4d9595785 /board
parent: aec118ebe63f7f0ab60916f9906fb3cb680abf7a (diff)
133 files changed, 309 insertions, 309 deletions
diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c
index c8dc186cddf..36945bbdccf 100644
--- a/board/BuR/brppt1/board.c
+++ b/board/BuR/brppt1/board.c
@@ -150,7 +150,7 @@ int board_init(void)
 #if defined(CONFIG_HW_WATCHDOG)
 	hw_watchdog_init();
 #endif
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c
index 2b08930af6f..f9a37e7215c 100644
--- a/board/BuS/eb_cpu5282/eb_cpu5282.c
+++ b/board/BuS/eb_cpu5282/eb_cpu5282.c
@@ -40,8 +40,8 @@ int dram_init(void)
 	MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
 			MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4);
 	asm (" nop");
-#ifdef CONFIG_SYS_SDRAM_BASE0
-	MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0)|
+#ifdef CFG_SYS_SDRAM_BASE0
+	MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CFG_SYS_SDRAM_BASE0)|
 		MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) |
 		MCFSDRAMC_DACR_PS_32;
 	asm (" nop");
@@ -54,7 +54,7 @@ int dram_init(void)
 	for (i = 0; i < 10; i++)
 		asm (" nop");
 
-	*(unsigned long *)(CONFIG_SYS_SDRAM_BASE0) = 0xA5A5A5A5;
+	*(unsigned long *)(CFG_SYS_SDRAM_BASE0) = 0xA5A5A5A5;
 	asm (" nop");
 	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
 	asm (" nop");
@@ -65,12 +65,12 @@ int dram_init(void)
 	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS;
 	asm (" nop");
 	/* write SDRAM mode register */
-	*(unsigned long *)(CONFIG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5;
+	*(unsigned long *)(CFG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5;
 	asm (" nop");
-	size += CONFIG_SYS_SDRAM_SIZE0 * 1024 * 1024;
+	size += CFG_SYS_SDRAM_SIZE0 * 1024 * 1024;
 #endif
-#ifdef CONFIG_SYS_SDRAM_BASE1xx
-	MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1)
+#ifdef CFG_SYS_SDRAM_BASE1xx
+	MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CFG_SYS_SDRAM_BASE1)
 			| MCFSDRAMC_DACR_CASL (1)
 			| MCFSDRAMC_DACR_CBM (3)
 			| MCFSDRAMC_DACR_PS_16;
@@ -79,15 +79,15 @@ int dram_init(void)
 
 	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
 
-	*(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5;
+	*(unsigned short *) (CFG_SYS_SDRAM_BASE1) = 0xA5A5;
 	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
 
 	for (i = 0; i < 2000; i++)
 		asm (" nop");
 
 	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
-	*(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
-	size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024;
+	*(unsigned int *) (CFG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
+	size += CFG_SYS_SDRAM_SIZE1 * 1024 * 1024;
 #endif
 	gd->ram_size = size;
 
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index ff1c4cb1707..a52a032e4d5 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -139,7 +139,7 @@ int board_fix_fdt(void *blob)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/Marvell/mvebu_alleycat-5/board.c b/board/Marvell/mvebu_alleycat-5/board.c
index 619cd6c6cd3..0c4f8e03b85 100644
--- a/board/Marvell/mvebu_alleycat-5/board.c
+++ b/board/Marvell/mvebu_alleycat-5/board.c
@@ -7,7 +7,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c
index c6ecc323bb9..45fe3e5f0bd 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -80,7 +80,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c
index 77c7dd7ab0e..a8899af6e5a 100644
--- a/board/Marvell/mvebu_armada-8k/board.c
+++ b/board/Marvell/mvebu_armada-8k/board.c
@@ -150,7 +150,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/Marvell/octeontx/board.c b/board/Marvell/octeontx/board.c
index 059ebf8f172..224653519b9 100644
--- a/board/Marvell/octeontx/board.c
+++ b/board/Marvell/octeontx/board.c
@@ -63,7 +63,7 @@ int timer_init(void)
 int dram_init(void)
 {
 	gd->ram_size = smc_dram_size(0);
-	gd->ram_size -= CONFIG_SYS_SDRAM_BASE;
+	gd->ram_size -= CFG_SYS_SDRAM_BASE;
 	mem_map_fill();
 
 	return 0;
diff --git a/board/Marvell/octeontx2/board.c b/board/Marvell/octeontx2/board.c
index 63aa2d61349..e7899f49f0c 100644
--- a/board/Marvell/octeontx2/board.c
+++ b/board/Marvell/octeontx2/board.c
@@ -105,7 +105,7 @@ int timer_init(void)
 int dram_init(void)
 {
 	gd->ram_size = smc_dram_size(0);
-	gd->ram_size -= CONFIG_SYS_SDRAM_BASE;
+	gd->ram_size -= CFG_SYS_SDRAM_BASE;
 
 	mem_map_fill();
 
diff --git a/board/Marvell/octeontx2_cn913x/board.c b/board/Marvell/octeontx2_cn913x/board.c
index 953e9db9c8e..3d20cfb2fab 100644
--- a/board/Marvell/octeontx2_cn913x/board.c
+++ b/board/Marvell/octeontx2_cn913x/board.c
@@ -34,7 +34,7 @@ int board_early_init_r(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index 4959a7fd6dc..ad02cf16da5 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -137,7 +137,7 @@ int misc_init_r (void)
 
 int dram_init (void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 #ifdef CONFIG_CM_SPD_DETECT
 	{
 extern void dram_query(void);
@@ -160,12 +160,12 @@ extern void dram_query(void);
 	 *
 	 */
 	sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
-	gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
+	gd->ram_size = get_ram_size((long *) CFG_SYS_SDRAM_BASE +
 				    REMAPPED_FLASH_SZ,
 				    0x01000000 << sdram_shift);
 	}
 #else
-	gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
+	gd->ram_size = get_ram_size((long *) CFG_SYS_SDRAM_BASE +
 				    REMAPPED_FLASH_SZ,
 				    PHYS_SDRAM_1_SIZE);
 #endif /* CM_SPD_DETECT */
diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c
index 1c830192653..763131c217e 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -73,7 +73,7 @@ static void flash__init(void)
 int dram_init(void)
 {
 	gd->ram_size =
-		get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
+		get_ram_size((long *)CFG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
 	return 0;
 }
 
diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c
index 3e2f79a1cf4..43563c41279 100644
--- a/board/astro/mcf5373l/mcf5373l.c
+++ b/board/astro/mcf5373l/mcf5373l.c
@@ -39,12 +39,12 @@ int dram_init(void)
 	 * GPIO configuration for bus should be set correctly from reset,
 	 * so we do not care! First, set up address space: at this point,
 	 * we should be running from internal SRAM;
-	 * so use CONFIG_SYS_SDRAM_BASE as the base address for SDRAM,
+	 * so use CFG_SYS_SDRAM_BASE as the base address for SDRAM,
 	 * and do not care where it is
 	 */
-	__raw_writel((CONFIG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000018,
+	__raw_writel((CFG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000018,
 			&sdp->cs0);
-	__raw_writel((CONFIG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000000,
+	__raw_writel((CFG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000000,
 			&sdp->cs1);
 	/*
 	 * I am not sure from the data sheet, but it seems burst length
@@ -72,7 +72,7 @@ int dram_init(void)
 	 */
 	__raw_writel(0x71462C00, &sdp->ctrl);
 	/* Dummy write to start SDRAM */
-	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(0, CFG_SYS_SDRAM_BASE);
 #endif
 
 	/*
@@ -82,8 +82,8 @@ int dram_init(void)
 	 * (Do not rely on the SDCS register(s) being set to 0x00000000
 	 * during reset as stated in the data sheet.)
 	 */
-	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
-				0x80000000 - CONFIG_SYS_SDRAM_BASE);
+	gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
+				0x80000000 - CFG_SYS_SDRAM_BASE);
 
 	return 0;
 }
diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index d2c6ada6683..b8e02f45903 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -81,7 +81,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	at91sam9260ek_nand_hw_init();
@@ -92,8 +92,8 @@ int board_init(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size(
-		(void *)CONFIG_SYS_SDRAM_BASE,
-		CONFIG_SYS_SDRAM_SIZE);
+		(void *)CFG_SYS_SDRAM_BASE,
+		CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c
index 2992353199f..eab3a130819 100644
--- a/board/atmel/at91sam9261ek/at91sam9261ek.c
+++ b/board/atmel/at91sam9261ek/at91sam9261ek.c
@@ -156,7 +156,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK;
 #endif
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	at91sam9261ek_nand_hw_init();
@@ -176,8 +176,8 @@ int board_eth_init(struct bd_info *bis)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-		CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+		CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index b2b70930805..15f20b62f67 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -95,7 +95,7 @@ int board_init(void)
 	/* arch number of AT91SAM9263EK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	at91sam9263ek_nand_hw_init();
@@ -108,8 +108,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-		CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+		CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index 2f3a772b81f..f53c1cf612d 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -168,7 +168,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9M10G45EK;
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	at91sam9m10g45ek_nand_hw_init();
@@ -181,8 +181,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *) CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
index 546851953a1..a3e294c88fc 100644
--- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c
+++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
@@ -99,7 +99,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_NAND_ATMEL
 	at91sam9n12ek_nand_hw_init();
@@ -114,8 +114,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-					CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+					CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c
index bca7c8d9af5..11725f778b7 100644
--- a/board/atmel/at91sam9rlek/at91sam9rlek.c
+++ b/board/atmel/at91sam9rlek/at91sam9rlek.c
@@ -93,7 +93,7 @@ int board_init(void)
 	/* arch number of AT91SAM9RLEK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK;
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	at91sam9rlek_nand_hw_init();
@@ -104,7 +104,7 @@ int board_init(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size(
-		(void *)CONFIG_SYS_SDRAM_BASE,
-		CONFIG_SYS_SDRAM_SIZE);
+		(void *)CFG_SYS_SDRAM_BASE,
+		CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
index 817aa2fef70..ab666b6be34 100644
--- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
@@ -115,7 +115,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	at91sam9x5ek_nand_hw_init();
@@ -129,8 +129,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
-					CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *) CFG_SYS_SDRAM_BASE,
+					CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/sam9x60ek/sam9x60ek.c b/board/atmel/sam9x60ek/sam9x60ek.c
index 786de18f8c6..a3e35f30666 100644
--- a/board/atmel/sam9x60ek/sam9x60ek.c
+++ b/board/atmel/sam9x60ek/sam9x60ek.c
@@ -120,7 +120,7 @@ int misc_init_r(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	sam9x60ek_nand_hw_init();
@@ -130,7 +130,7 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
diff --git a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
index 6524867708a..6e41017af17 100644
--- a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
+++ b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
@@ -65,7 +65,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	rgb_leds_init();
 
@@ -84,8 +84,8 @@ int misc_init_r(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/sama5d2_icp/sama5d2_icp.c b/board/atmel/sama5d2_icp/sama5d2_icp.c
index 02077700282..fabe492715a 100644
--- a/board/atmel/sama5d2_icp/sama5d2_icp.c
+++ b/board/atmel/sama5d2_icp/sama5d2_icp.c
@@ -54,7 +54,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	rgb_leds_init();
 
@@ -63,8 +63,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
index 16e9183f541..854715ea226 100644
--- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
+++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
@@ -115,7 +115,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	rgb_leds_init();
 
@@ -130,8 +130,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
index a778f2694df..ce73a801e50 100644
--- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c
+++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
@@ -94,7 +94,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_NAND_ATMEL
 	sama5d3_xplained_nand_hw_init();
@@ -110,8 +110,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index 008f1db6b0e..660a6b9d583 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -147,7 +147,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_NAND_ATMEL
 	sama5d3xek_nand_hw_init();
@@ -166,8 +166,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c
index 4058594e4de..780aba15ab1 100644
--- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c
+++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c
@@ -121,7 +121,7 @@ int misc_init_r(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_NAND_ATMEL
 	sama5d4_xplained_nand_hw_init();
@@ -135,8 +135,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c
index ef5a8a0d5cc..2226906a3b3 100644
--- a/board/atmel/sama5d4ek/sama5d4ek.c
+++ b/board/atmel/sama5d4ek/sama5d4ek.c
@@ -107,7 +107,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_NAND_ATMEL
 	sama5d4ek_nand_hw_init();
@@ -121,8 +121,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/atmel/sama7g5ek/sama7g5ek.c b/board/atmel/sama7g5ek/sama7g5ek.c
index 7d83e76f9ac..295fd079dcf 100644
--- a/board/atmel/sama7g5ek/sama7g5ek.c
+++ b/board/atmel/sama7g5ek/sama7g5ek.c
@@ -67,7 +67,7 @@ int misc_init_r(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	board_leds_init();
 
@@ -76,7 +76,7 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
diff --git a/board/bluewater/gurnard/gurnard.c b/board/bluewater/gurnard/gurnard.c
index 35c74ba9dd2..9b42299b080 100644
--- a/board/bluewater/gurnard/gurnard.c
+++ b/board/bluewater/gurnard/gurnard.c
@@ -307,7 +307,7 @@ int board_init(void)
 	gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
 
 	/* Address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	ret = gurnard_nand_hw_init();
@@ -407,8 +407,8 @@ int board_eth_init(struct bd_info *bis)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c
index bdf8d06add8..c31e2c86a2d 100644
--- a/board/bosch/guardian/board.c
+++ b/board/bosch/guardian/board.c
@@ -182,7 +182,7 @@ int board_init(void)
 	hw_watchdog_init();
 #endif
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_MTD_RAW_NAND
 	gpmc_init();
diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
index a7a9775fdf4..e3a9c00e809 100644
--- a/board/bosch/shc/board.c
+++ b/board/bosch/shc/board.c
@@ -449,7 +449,7 @@ int board_init(void)
 	if (read_eeprom() < 0)
 		puts("EEPROM Content Invalid.\n");
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
diff --git a/board/broadcom/bcm_ep/board.c b/board/broadcom/bcm_ep/board.c
index 6064eb43db1..e91fa40e640 100644
--- a/board/broadcom/bcm_ep/board.c
+++ b/board/broadcom/bcm_ep/board.c
@@ -26,7 +26,7 @@ int board_init(void)
 	 * Address of boot parameters passed to kernel
 	 * Use default offset 0x100
 	 */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
@@ -36,14 +36,14 @@ int board_init(void)
  */
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
 int dram_init_banksize(void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
 
 	return 0;
diff --git a/board/calao/usb_a9263/usb_a9263.c b/board/calao/usb_a9263/usb_a9263.c
index c89ad0bfe3d..3d31776d484 100644
--- a/board/calao/usb_a9263/usb_a9263.c
+++ b/board/calao/usb_a9263/usb_a9263.c
@@ -95,7 +95,7 @@ static void usb_a9263_macb_hw_init(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	usb_a9263_nand_hw_init();
@@ -111,8 +111,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c
index 3e2418866c7..69a9df94231 100644
--- a/board/cobra5272/cobra5272.c
+++ b/board/cobra5272/cobra5272.c
@@ -28,7 +28,7 @@ int dram_init(void)
 	/* Dummy write to start SDRAM */
 	*((volatile unsigned long *) 0) = 0;
 
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE * 1024 * 1024;
 
 	return 0;
 };
diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c
index bcfe1bfaf67..5df378a62e3 100644
--- a/board/compulab/cm_t43/cm_t43.c
+++ b/board/compulab/cm_t43/cm_t43.c
@@ -45,7 +45,7 @@ int power_init_board(void)
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	gpmc_init();
 	set_i2c_pin_mux();
 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
diff --git a/board/compulab/cm_t43/spl.c b/board/compulab/cm_t43/spl.c
index e67bf81ee3a..a6223a477fe 100644
--- a/board/compulab/cm_t43/spl.c
+++ b/board/compulab/cm_t43/spl.c
@@ -119,7 +119,7 @@ void sdram_init(void)
 	unsigned long ram_size;
 
 	config_ddr(0, &ioregs_ddr3, NULL, NULL, &ddr3_emif_regs, 0);
-	ram_size = get_ram_size((long int *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
+	ram_size = get_ram_size((long int *)CFG_SYS_SDRAM_BASE, 0x80000000);
 	if (ram_size == 0x80000000 ||
 	    ram_size == 0x40000000 ||
 	    ram_size == 0x20000000)
@@ -127,7 +127,7 @@ void sdram_init(void)
 
 	ddr3_emif_regs.sdram_config = 0x638453B2;
 	config_ddr(0, &ioregs_ddr3, NULL, NULL, &ddr3_emif_regs, 0);
-	ram_size = get_ram_size((long int *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
+	ram_size = get_ram_size((long int *)CFG_SYS_SDRAM_BASE, 0x80000000);
 	if (ram_size == 0x08000000)
 		return;
 
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
index c20e8714949..e95e04a30a6 100644
--- a/board/cssi/MCR3000/MCR3000.c
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -114,7 +114,7 @@ int dram_init(void)
 	out_be32(&memctl->memc_mcr, 0x80002038);
 	udelay(200);
 
-	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
 				    SDRAM_MAX_SIZE);
 
 	return 0;
diff --git a/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c b/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c
index 72cf46c749f..2b03e4891d9 100644
--- a/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c
+++ b/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c
@@ -29,13 +29,13 @@ board_early_init_f(void)
 int
 board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x2000;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x2000;
 	return 0;
 }
 
 int
 dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, SZ_64M);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_64M);
 	return 0;
 }
diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c
index 1054837d434..648d77fd21e 100644
--- a/board/eets/pdu001/board.c
+++ b/board/eets/pdu001/board.c
@@ -286,7 +286,7 @@ int board_init(void)
 	hw_watchdog_init();
 #endif
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	return 0;
 }
 
diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c
index a5d79d8e3e1..913c2ea1664 100644
--- a/board/egnite/ethernut5/ethernut5.c
+++ b/board/egnite/ethernut5/ethernut5.c
@@ -85,8 +85,8 @@ DECLARE_GLOBAL_DATA_PTR;
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size(
-			(void *)CONFIG_SYS_SDRAM_BASE,
-			CONFIG_SYS_SDRAM_SIZE);
+			(void *)CFG_SYS_SDRAM_BASE,
+			CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
@@ -135,7 +135,7 @@ int board_init(void)
 	at91_periph_clk_enable(ATMEL_ID_PIOC);
 
 	/* Set adress of boot parameters. */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	/* Initialize UARTs and power management. */
 	ethernut5_power_init();
 #ifdef CONFIG_CMD_NAND
diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
index 16237e29e46..3df3e41c0b2 100644
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -126,7 +126,7 @@ void *board_fdt_blob_setup(int *err)
 {
 	*err = 0;
 	/* QEMU loads a generated DTB for us at the start of RAM. */
-	return (void *)CONFIG_SYS_SDRAM_BASE;
+	return (void *)CFG_SYS_SDRAM_BASE;
 }
 
 void enable_caches(void)
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 98043b020c5..2304e9e8ec3 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -264,7 +264,7 @@ int board_init(void)
 	meesc_ethercat_hw_init();
 
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	meesc_nand_hw_init();
diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c
index f5bed6c35bb..46ffd817b44 100644
--- a/board/freescale/common/arm_sleep.c
+++ b/board/freescale/common/arm_sleep.c
@@ -61,7 +61,7 @@ static void dp_ddr_restore(void)
 
 	/* get the address of ddr date from SPARECR3 */
 	src = (u64 *)in_le32(&scfg->sparecr[2]);
-	dst = (u64 *)CONFIG_SYS_SDRAM_BASE;
+	dst = (u64 *)CFG_SYS_SDRAM_BASE;
 
 	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
 		*dst++ = *src++;
diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c
index 71922aab4ef..d3323b9ec1e 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -50,7 +50,7 @@ static void dp_ddr_restore(void)
 
 	/* get the address of ddr date from SPARECR3 */
 	src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8);
-	dst = (u64 *)(CONFIG_SYS_SDRAM_BASE + DDR_BUFF_LEN - 8);
+	dst = (u64 *)(CFG_SYS_SDRAM_BASE + DDR_BUFF_LEN - 8);
 
 	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
 		*dst-- = *src--;
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
index bc37c553a5b..f2b8750a3f3 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -102,7 +102,7 @@ int dram_init(void)
 		else
 			gd->ram_size = SYS_SDRAM_SIZE_512;
 #else
-		gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+		gd->ram_size = CFG_SYS_SDRAM_SIZE;
 #endif
 	}
 	return 0;
@@ -139,7 +139,7 @@ int dram_init(void)
 		gd->ram_size = SYS_SDRAM_SIZE_512;
 	}
 #else
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE;
 #endif
 	mmdc_init(&mparam);
 
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 3f70fbc3565..f17a6c186d3 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -66,7 +66,7 @@ int dram_init(void)
 {
 	gd->ram_size = tfa_get_dram_size();
 	if (!gd->ram_size)
-		gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+		gd->ram_size = CFG_SYS_SDRAM_SIZE;
 
 	return 0;
 }
@@ -90,7 +90,7 @@ int dram_init(void)
 	};
 
 	mmdc_init(&mparam);
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE;
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 	/* This will break-before-make MMU for DDR */
 	update_early_mmu_table();
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 456609d9932..62c935e4d3e 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -113,7 +113,7 @@ int dram_init(void)
 {
 	gd->ram_size = tfa_get_dram_size();
 	if (!gd->ram_size)
-		gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+		gd->ram_size = CFG_SYS_SDRAM_SIZE;
 
 	return 0;
 }
@@ -140,7 +140,7 @@ int dram_init(void)
 	mmdc_init(&mparam);
 #endif
 
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE;
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 	/* This will break-before-make MMU for DDR */
 	update_early_mmu_table();
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index 66fe1519cc6..4e70acc5a0c 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -192,7 +192,7 @@ int fsl_initdram(void)
 
 int dram_init_banksize(void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
 
 	return 0;
diff --git a/board/freescale/ls1021atsn/ls1021atsn.c b/board/freescale/ls1021atsn/ls1021atsn.c
index 4325439be95..d144f25c623 100644
--- a/board/freescale/ls1021atsn/ls1021atsn.c
+++ b/board/freescale/ls1021atsn/ls1021atsn.c
@@ -47,7 +47,7 @@ static void ddrmc_init(void)
 	if (is_warm_boot()) {
 		out_be32(&ddr->sdram_cfg_2,
 			 DDR_SDRAM_CFG_2 & ~SDRAM_CFG2_D_INIT);
-		out_be32(&ddr->init_addr, CONFIG_SYS_SDRAM_BASE);
+		out_be32(&ddr->init_addr, CFG_SYS_SDRAM_BASE);
 		out_be32(&ddr->init_ext_addr, (1 << 31));
 
 		/* DRAM VRef will not be trained */
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 33027ad0575..8b74d458237 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -162,7 +162,7 @@ void ddrmc_init(void)
 	if (is_warm_boot()) {
 		out_be32(&ddr->sdram_cfg_2,
 			 DDR_SDRAM_CFG_2 & ~SDRAM_CFG2_D_INIT);
-		out_be32(&ddr->init_addr, CONFIG_SYS_SDRAM_BASE);
+		out_be32(&ddr->init_addr, CFG_SYS_SDRAM_BASE);
 		out_be32(&ddr->init_ext_addr, (1 << 31));
 
 		/* DRAM VRef will not be trained */
diff --git a/board/freescale/m5208evbe/m5208evbe.c b/board/freescale/m5208evbe/m5208evbe.c
index 7bfb4557dd5..6125c9e13aa 100644
--- a/board/freescale/m5208evbe/m5208evbe.c
+++ b/board/freescale/m5208evbe/m5208evbe.c
@@ -29,7 +29,7 @@ int dram_init(void)
 	sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
 	u32 dramsize, i;
 
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+	dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
 
 	for (i = 0x13; i < 0x20; i++) {
 		if (dramsize == (1 << i))
@@ -37,35 +37,35 @@ int dram_init(void)
 	}
 	i--;
 
-	out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i);
+	out_be32(&sdram->cs0, CFG_SYS_SDRAM_BASE | i);
+#ifdef CFG_SYS_SDRAM_BASE1
+	out_be32(&sdram->cs1, CFG_SYS_SDRAM_BASE | i);
 #endif
-	out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
-	out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
+	out_be32(&sdram->cfg1, CFG_SYS_SDRAM_CFG1);
+	out_be32(&sdram->cfg2, CFG_SYS_SDRAM_CFG2);
 
 	udelay(500);
 
 	/* Issue PALL */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 	asm("nop");
 
 	/* Perform two refresh cycles */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
 	asm("nop");
 
 	/* Issue LEMR */
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE);
 	asm("nop");
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_EMOD);
 	asm("nop");
 
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 	asm("nop");
 
 	out_be32(&sdram->ctrl,
-		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
+		(CFG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
 	asm("nop");
 
 	udelay(100);
diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c
index e7c7a94036b..44161a0b0a1 100644
--- a/board/freescale/m5235evb/m5235evb.c
+++ b/board/freescale/m5235evb/m5235evb.c
@@ -44,7 +44,7 @@ int dram_init(void)
 		GPIO_PAR_SDRAM_SRAS | GPIO_PAR_SDRAM_SCKE |
 		GPIO_PAR_SDRAM_SDCS(3));
 
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+	dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
 	for (i = 0x13; i < 0x20; i++) {
 		if (dramsize == (1 << i))
 			break;
@@ -61,7 +61,7 @@ int dram_init(void)
 
 		/* Initialize DACR0 */
 		out_be32(&sdram->dacr0,
-			SDRAMC_DARCn_BA(CONFIG_SYS_SDRAM_BASE) |
+			SDRAMC_DARCn_BA(CFG_SYS_SDRAM_BASE) |
 			SDRAMC_DARCn_CASL_C1 | SDRAMC_DARCn_CBM_CMD20 |
 			SDRAMC_DARCn_PS_32);
 		asm("nop");
@@ -80,7 +80,7 @@ int dram_init(void)
 		}
 
 		/* Write to this block to initiate precharge */
-		*(u32 *) (CONFIG_SYS_SDRAM_BASE) = 0xA5A59696;
+		*(u32 *) (CFG_SYS_SDRAM_BASE) = 0xA5A59696;
 
 		/*  Set RE (bit 15) in DACR */
 		setbits_be32(&sdram->dacr0, SDRAMC_DARCn_RE);
@@ -95,7 +95,7 @@ int dram_init(void)
 		asm("nop");
 
 		/* Write to the SDRAM Mode Register */
-		*(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696;
+		*(u32 *) (CFG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696;
 	}
 
 	gd->ram_size = dramsize;
diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c
index 48c00791114..efff0551409 100644
--- a/board/freescale/m5249evb/m5249evb.c
+++ b/board/freescale/m5249evb/m5249evb.c
@@ -86,7 +86,7 @@ int dram_init(void)
 	mbar_writeLong(MCFSIM_DACR0, 0x0000b364);  /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
 	*((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */
 
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE * 1024 * 1024;
 
 	return 0;
 };
diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c
index 85f5f0c0340..179a2a242a8 100644
--- a/board/freescale/m5253demo/m5253demo.c
+++ b/board/freescale/m5253demo/m5253demo.c
@@ -47,7 +47,7 @@ int dram_init(void)
 		__asm__("nop");
 
 		/* Initialize DMR0 */
-		dramsize = (CONFIG_SYS_SDRAM_SIZE << 20);
+		dramsize = (CFG_SYS_SDRAM_SIZE << 20);
 		temp = (dramsize - 1) & 0xFFFC0000;
 		mbar_writeLong(MCFSIM_DMR0, temp | 1);
 		__asm__("nop");
@@ -57,7 +57,7 @@ int dram_init(void)
 		__asm__("nop");
 
 		/* Write to this block to initiate precharge */
-		*(u32 *) (CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
+		*(u32 *) (CFG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
 		mb();
 		__asm__("nop");
 
@@ -74,7 +74,7 @@ int dram_init(void)
 			       mbar_readLong(MCFSIM_DACR0) | 0x0040);
 		__asm__("nop");
 
-		*(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
+		*(u32 *) (CFG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
 		mb();
 	}
 
diff --git a/board/freescale/m5272c3/m5272c3.c b/board/freescale/m5272c3/m5272c3.c
index 9580cf2a039..3c20a23385c 100644
--- a/board/freescale/m5272c3/m5272c3.c
+++ b/board/freescale/m5272c3/m5272c3.c
@@ -30,7 +30,7 @@ int dram_init(void)
 	/* Dummy write to start SDRAM */
 	*((volatile unsigned long *)0) = 0;
 
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE * 1024 * 1024;
 
 	return 0;
 	};
diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c
index 1c4fb7232af..00fa35ca5f7 100644
--- a/board/freescale/m5275evb/m5275evb.c
+++ b/board/freescale/m5275evb/m5275evb.c
@@ -35,7 +35,7 @@ int dram_init(void)
 	out_be16(&gpio_reg->par_sdram, 0x3FF);
 
 	/* Set up chip select */
-	out_be32(&sdp->sdbar0, CONFIG_SYS_SDRAM_BASE);
+	out_be32(&sdp->sdbar0, CFG_SYS_SDRAM_BASE);
 	out_be32(&sdp->sdbmr0, MCF_SDRAMC_SDMRn_BAM_32M | MCF_SDRAMC_SDMRn_V);
 
 	/* Set up timing */
@@ -49,34 +49,34 @@ int dram_init(void)
 	setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL);
 
 	/* Dummy write to start SDRAM */
-	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696;
 
 	/* Send LEMR */
 	setbits_be32(&sdp->sdmr,
 		MCF_SDRAMC_SDMR_BNKAD_LEMR | MCF_SDRAMC_SDMR_AD(0x0) |
 		MCF_SDRAMC_SDMR_CMD);
-	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696;
 
 	/* Send LMR */
 	out_be32(&sdp->sdmr, 0x058d0000);
-	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696;
 
 	/* Stop sending commands */
 	clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD);
 
 	/* Set precharge */
 	setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL);
-	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696;
 
 	/* Stop manual precharge, send 2 IREF */
 	clrbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL);
 	setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IREF);
-	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
-	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696;
 
 
 	out_be32(&sdp->sdmr, 0x018d0000);
-	*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696;
 
 	/* Stop sending commands */
 	clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD);
@@ -91,7 +91,7 @@ int dram_init(void)
 		| MCF_SDRAMC_SDCR_RCNT((SDRAM_TREFI/(PERIOD*64)) - 1 + 1)
 		| MCF_SDRAMC_SDCR_DQS_OE(0x3));
 
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE * 1024 * 1024;
 
 	return 0;
 };
diff --git a/board/freescale/m5282evb/m5282evb.c b/board/freescale/m5282evb/m5282evb.c
index e1ea9b3a58f..53e0f202101 100644
--- a/board/freescale/m5282evb/m5282evb.c
+++ b/board/freescale/m5282evb/m5282evb.c
@@ -21,7 +21,7 @@ int dram_init(void)
 {
 	u32 dramsize, i, dramclk;
 
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+	dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
 	for (i = 0x13; i < 0x20; i++) {
 		if (dramsize == (1 << i))
 			break;
@@ -40,7 +40,7 @@ int dram_init(void)
 
 		/* Initialize DACR0 */
 		MCFSDRAMC_DACR0 = (0
-			| MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE)
+			| MCFSDRAMC_DACR_BASE(CFG_SYS_SDRAM_BASE)
 			| MCFSDRAMC_DACR_CASL(1)
 			| MCFSDRAMC_DACR_CBM(3)
 			| MCFSDRAMC_DACR_PS_32);
@@ -62,7 +62,7 @@ int dram_init(void)
 		}
 
 		/* Write to this block to initiate precharge */
-		*(u32 *)(CONFIG_SYS_SDRAM_BASE) = 0xA5A59696;
+		*(u32 *)(CFG_SYS_SDRAM_BASE) = 0xA5A59696;
 		asm("nop");
 
 		/* Set RE (bit 15) in DACR */
@@ -79,7 +79,7 @@ int dram_init(void)
 		asm("nop");
 
 		/* Write to the SDRAM Mode Register */
-		*(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696;
+		*(u32 *)(CFG_SYS_SDRAM_BASE + 0x400) = 0xA5A59696;
 	}
 	gd->ram_size = dramsize;
 
diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README
index 8a7d8cadf02..0de36a7f747 100644
--- a/board/freescale/m53017evb/README
+++ b/board/freescale/m53017evb/README
@@ -106,7 +106,7 @@ CONFIG_SYS_CSn_BASE		-- defines the Chip Select Base register
 CONFIG_SYS_CSn_MASK		-- defines the Chip Select Mask register
 CONFIG_SYS_CSn_CTRL		-- defines the Chip Select Control register
 
-CONFIG_SYS_SDRAM_BASE		-- defines the DRAM Base
+CFG_SYS_SDRAM_BASE		-- defines the DRAM Base
 
 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
 ===========================================
diff --git a/board/freescale/m53017evb/m53017evb.c b/board/freescale/m53017evb/m53017evb.c
index c9f89353ce4..76ebc0ab8dc 100644
--- a/board/freescale/m53017evb/m53017evb.c
+++ b/board/freescale/m53017evb/m53017evb.c
@@ -29,7 +29,7 @@ int dram_init(void)
 	sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
 	u32 dramsize, i;
 
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+	dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
 
 	for (i = 0x13; i < 0x20; i++) {
 		if (dramsize == (1 << i))
@@ -37,35 +37,35 @@ int dram_init(void)
 	}
 	i--;
 
-	out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i);
+	out_be32(&sdram->cs0, CFG_SYS_SDRAM_BASE | i);
+#ifdef CFG_SYS_SDRAM_BASE1
+	out_be32(&sdram->cs1, CFG_SYS_SDRAM_BASE | i);
 #endif
-	out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
-	out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
+	out_be32(&sdram->cfg1, CFG_SYS_SDRAM_CFG1);
+	out_be32(&sdram->cfg2, CFG_SYS_SDRAM_CFG2);
 
 	udelay(500);
 
 	/* Issue PALL */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 	asm("nop");
 
 	/* Perform two refresh cycles */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
 	asm("nop");
 
 	/* Issue LEMR */
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE);
 	asm("nop");
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_EMOD);
 	asm("nop");
 
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 	asm("nop");
 
 	out_be32(&sdram->ctrl,
-		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
+		(CFG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
 	asm("nop");
 
 	udelay(100);
diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c
index 7a75b04dd0d..b278dbfb485 100644
--- a/board/freescale/m5329evb/m5329evb.c
+++ b/board/freescale/m5329evb/m5329evb.c
@@ -29,7 +29,7 @@ int dram_init(void)
 	sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
 	u32 dramsize, i;
 
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+	dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
 
 	for (i = 0x13; i < 0x20; i++) {
 		if (dramsize == (1 << i))
@@ -37,30 +37,30 @@ int dram_init(void)
 	}
 	i--;
 
-	out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
-	out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
-	out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
+	out_be32(&sdram->cs0, CFG_SYS_SDRAM_BASE | i);
+	out_be32(&sdram->cfg1, CFG_SYS_SDRAM_CFG1);
+	out_be32(&sdram->cfg2, CFG_SYS_SDRAM_CFG2);
 
 	/* Issue PALL */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 
 	/* Issue LEMR */
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_EMOD);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE | 0x04000000);
 
 	udelay(500);
 
 	/* Issue PALL */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 
 	/* Perform two refresh cycles */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
 
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE);
 
 	out_be32(&sdram->ctrl,
-		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
+		(CFG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
 
 	udelay(100);
 
diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README
index bba54202155..bfbcd5dc81d 100644
--- a/board/freescale/m5373evb/README
+++ b/board/freescale/m5373evb/README
@@ -105,7 +105,7 @@ CONFIG_SYS_CSn_BASE	-- defines the Chip Select Base register
 CONFIG_SYS_CSn_MASK	-- defines the Chip Select Mask register
 CONFIG_SYS_CSn_CTRL	-- defines the Chip Select Control register
 
-CONFIG_SYS_SDRAM_BASE	-- defines the DRAM Base
+CFG_SYS_SDRAM_BASE	-- defines the DRAM Base
 
 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
 ===========================================
diff --git a/board/freescale/m5373evb/m5373evb.c b/board/freescale/m5373evb/m5373evb.c
index cfa5ca4a477..0e9eec316c2 100644
--- a/board/freescale/m5373evb/m5373evb.c
+++ b/board/freescale/m5373evb/m5373evb.c
@@ -29,7 +29,7 @@ int dram_init(void)
 	sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
 	u32 dramsize, i;
 
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+	dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
 
 	for (i = 0x13; i < 0x20; i++) {
 		if (dramsize == (1 << i))
@@ -37,30 +37,30 @@ int dram_init(void)
 	}
 	i--;
 
-	out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
-	out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
-	out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
+	out_be32(&sdram->cs0, CFG_SYS_SDRAM_BASE | i);
+	out_be32(&sdram->cfg1, CFG_SYS_SDRAM_CFG1);
+	out_be32(&sdram->cfg2, CFG_SYS_SDRAM_CFG2);
 
 	/* Issue PALL */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 
 	/* Issue LEMR */
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_EMOD);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE | 0x04000000);
 
 	udelay(500);
 
 	/* Issue PALL */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 2);
 
 	/* Perform two refresh cycles */
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
-	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CFG_SYS_SDRAM_CTRL | 4);
 
-	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
+	out_be32(&sdram->mode, CFG_SYS_SDRAM_MODE);
 
 	out_be32(&sdram->ctrl,
-		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
+		(CFG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
 
 	udelay(100);
 
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 2650d300e38..85d43cccd1a 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -97,10 +97,10 @@ int dram_init(void)
 int fixed_sdram(void)
 {
 	immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 msize = CONFIG_SYS_SDRAM_SIZE;
+	u32 msize = CFG_SYS_SDRAM_SIZE;
 	u32 msize_log2 = __ilog2(msize);
 
-	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000;
+	im->sysconf.ddrlaw[0].bar = CFG_SYS_SDRAM_BASE & 0xfffff000;
 	im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 
 	im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
@@ -127,7 +127,7 @@ int fixed_sdram(void)
 
 	im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
 	udelay(2000);
-	return CONFIG_SYS_SDRAM_SIZE >> 20;
+	return CFG_SYS_SDRAM_SIZE >> 20;
 }
 #endif	/*!CONFIG_SYS_SPD_EEPROM */
 
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 46095acedfd..86364acf8ca 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int dram_init(void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
 				PHYS_SDRAM_1_SIZE);
 	return 0;
 }
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index 038e6736ace..f896fd7ccce 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -244,7 +244,7 @@ phys_size_t fixed_sdram(void)
 	printf("Configuring DDR for %s MT/s data rate\n",
 			strmhz(buf, sysinfo.freq_ddrbus));
 
-	ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+	ddr_size = CFG_SYS_SDRAM_SIZE * 1024 * 1024;
 
 	fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0);
 
diff --git a/board/friendlyarm/nanopi2/board.c b/board/friendlyarm/nanopi2/board.c
index 70e4dfcfa45..954197282e6 100644
--- a/board/friendlyarm/nanopi2/board.c
+++ b/board/friendlyarm/nanopi2/board.c
@@ -507,7 +507,7 @@ int splash_screen_prepare(void)
 /* u-boot dram initialize */
 int dram_init(void)
 {
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE;
 	return 0;
 }
 
@@ -518,10 +518,10 @@ int dram_init_banksize(void)
 	unsigned int reg_val = readl(SCR_USER_SIG6_READ);
 
 	/* set global data memory */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x00000100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x00000100;
 
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size  = CONFIG_SYS_SDRAM_SIZE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size  = CFG_SYS_SDRAM_SIZE;
 
 	/* Number of Row: 14 bits */
 	if ((reg_val >> 28) == 14)
diff --git a/board/gardena/smart-gateway-at91sam/board.c b/board/gardena/smart-gateway-at91sam/board.c
index c6eb11e9326..d9dfb256b32 100644
--- a/board/gardena/smart-gateway-at91sam/board.c
+++ b/board/gardena/smart-gateway-at91sam/board.c
@@ -45,15 +45,15 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* Address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/board/gdsys/mpc8308/sdram.c b/board/gdsys/mpc8308/sdram.c
index 47b88043521..4889a6a4f3b 100644
--- a/board/gdsys/mpc8308/sdram.c
+++ b/board/gdsys/mpc8308/sdram.c
@@ -34,11 +34,11 @@ DECLARE_GLOBAL_DATA_PTR;
 static long fixed_sdram(void)
 {
 	immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-	u32 msize = CONFIG_SYS_SDRAM_SIZE;
+	u32 msize = CFG_SYS_SDRAM_SIZE;
 	u32 msize_log2 = __ilog2(msize);
 
 	out_be32(&im->sysconf.ddrlaw[0].bar,
-		 CONFIG_SYS_SDRAM_BASE  & 0xfffff000);
+		 CFG_SYS_SDRAM_BASE  & 0xfffff000);
 	out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1));
 	out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE);
 
@@ -66,7 +66,7 @@ static long fixed_sdram(void)
 	setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
 	sync();
 
-	return get_ram_size(CONFIG_SYS_SDRAM_BASE, msize);
+	return get_ram_size(CFG_SYS_SDRAM_BASE, msize);
 }
 
 int dram_init(void)
diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c
index 6423c1efb24..b472ca5b94a 100644
--- a/board/grinn/chiliboard/board.c
+++ b/board/grinn/chiliboard/board.c
@@ -95,7 +95,7 @@ int board_init(void)
 	hw_watchdog_init();
 #endif
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	gpmc_init();
 
 	return 0;
diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c
index 5b245cb4473..8532225dc0d 100644
--- a/board/imgtec/boston/ddr.c
+++ b/board/imgtec/boston/ddr.c
@@ -27,7 +27,7 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 
-	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
+	if (gd->ram_top < CFG_SYS_SDRAM_BASE) {
 		/* 2GB wrapped around to 0 */
 		return CKSEG0ADDR(256 << 20);
 	}
diff --git a/board/imgtec/malta/lowlevel_init.S b/board/imgtec/malta/lowlevel_init.S
index bed24972f7a..aa910bf1ce1 100644
--- a/board/imgtec/malta/lowlevel_init.S
+++ b/board/imgtec/malta/lowlevel_init.S
@@ -118,7 +118,7 @@ _msc01:
 	/* setup basic address decode */
 	PTR_LI	t0, CKSEG1ADDR(MALTA_MSC01_BIU_BASE)
 	li	t1, 0x0
-	li	t2, -CONFIG_SYS_SDRAM_SIZE
+	li	t2, -CFG_SYS_SDRAM_SIZE
 	sw	t1, MSC01_BIU_MCBAS1L_OFS(t0)
 	sw	t2, MSC01_BIU_MCMSK1L_OFS(t0)
 	sw	t1, MSC01_BIU_MCBAS2L_OFS(t0)
@@ -168,7 +168,7 @@ _msc01:
 	sw	t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
 
 	/* setup PCI_BAR0 memory window */
-	li	t1, -CONFIG_SYS_SDRAM_SIZE
+	li	t1, -CFG_SYS_SDRAM_SIZE
 	sw	t1, MSC01_PCI_BAR0_OFS(t0)
 
 	/* setup PCI to SysCon/CPU translation */
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index 9853a0ba82f..4a72ab5ceca 100644
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec/malta/malta.c
@@ -94,7 +94,7 @@ static enum sys_con malta_sys_con(void)
 
 int dram_init(void)
 {
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE;
 
 	return 0;
 }
diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c
index 6a836370e36..71226927211 100644
--- a/board/imgtec/xilfpga/xilfpga.c
+++ b/board/imgtec/xilfpga/xilfpga.c
@@ -19,7 +19,7 @@ int dram_init(void)
 {
 	/* MIG IP block is smart and doesn't need SW
 	 * to do any init */
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;	/* in bytes */
+	gd->ram_size = CFG_SYS_SDRAM_SIZE;	/* in bytes */
 
 	return 0;
 }
diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c
index 7dbb3a91432..f3a0de3967b 100644
--- a/board/inversepath/usbarmory/usbarmory.c
+++ b/board/inversepath/usbarmory/usbarmory.c
@@ -412,7 +412,7 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 1 << 30);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, 1 << 30);
 	return 0;
 }
 
diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c
index 02ae7df04db..5462a3dea22 100644
--- a/board/isee/igep003x/board.c
+++ b/board/isee/igep003x/board.c
@@ -185,7 +185,7 @@ int spl_start_uboot(void)
  */
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	gpmc_init();
 
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index c8138dcf305..0252ada93ff 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -52,7 +52,7 @@ int set_km_env(void)
 	char envval[16];
 	char *p;
 
-	pnvramaddr = CONFIG_SYS_SDRAM_BASE + gd->ram_size -
+	pnvramaddr = CFG_SYS_SDRAM_BASE + gd->ram_size -
 		CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM - CONFIG_KM_PNVRAM;
 	sprintf(envval, "0x%x", pnvramaddr);
 	env_set("pnvramaddr", envval);
@@ -65,7 +65,7 @@ int set_km_env(void)
 		CONFIG_KM_PNVRAM) / 0x400;
 	env_set_ulong("pram", pram);
 
-	varaddr = CONFIG_SYS_SDRAM_BASE + gd->ram_size -
+	varaddr = CFG_SYS_SDRAM_BASE + gd->ram_size -
 		CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM;
 	env_set_hex("varaddr", varaddr);
 	sprintf(envval, "0x%x", varaddr);
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 6a7b8481614..ddd8f7a13e1 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -142,10 +142,10 @@ static int fixed_sdram(void)
 	setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
 
 	disable_addr_trans();
-	msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE);
+	msize = get_ram_size(CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE);
 	enable_addr_trans();
 	msize /= (1024 * 1024);
-	if (CONFIG_SYS_SDRAM_SIZE >> 20 != msize) {
+	if (CFG_SYS_SDRAM_SIZE >> 20 != msize) {
 		for (ddr_size = msize << 20, ddr_size_log2 = 0;
 			(ddr_size > 1);
 			ddr_size = ddr_size >> 1, ddr_size_log2++)
@@ -169,7 +169,7 @@ int dram_init(void)
 		return -ENXIO;
 
 	out_be32(&im->sysconf.ddrlaw[0].bar,
-		CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR);
+		CFG_SYS_SDRAM_BASE & LAWBAR_BAR);
 	msize = fixed_sdram();
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
diff --git a/board/keymile/pg-wcom-ls102xa/ddr.c b/board/keymile/pg-wcom-ls102xa/ddr.c
index 4ec60f16854..556d39d4d4e 100644
--- a/board/keymile/pg-wcom-ls102xa/ddr.c
+++ b/board/keymile/pg-wcom-ls102xa/ddr.c
@@ -84,7 +84,7 @@ int fsl_initdram(void)
 
 int dram_init_banksize(void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
 
 	return 0;
diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index 3719bcf7317..1a7fa3fc1e4 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -184,7 +184,7 @@ int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
 {
 	/* Define only 1MiB range for mem_regions at the middle of the RAM */
 	/* For 1GiB range mem_regions takes approx. 4min */
-	*vstart = CONFIG_SYS_SDRAM_BASE + (gd->ram_size >> 1);
+	*vstart = CFG_SYS_SDRAM_BASE + (gd->ram_size >> 1);
 	*size = 1 << 20;
 	return 0;
 }
diff --git a/board/l+g/vinco/vinco.c b/board/l+g/vinco/vinco.c
index d47c7b5f1eb..b3c176dd59a 100644
--- a/board/l+g/vinco/vinco.c
+++ b/board/l+g/vinco/vinco.c
@@ -164,7 +164,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #if !CONFIG_IS_ENABLED(DM_SPI)
 	vinco_spi0_hw_init();
@@ -188,8 +188,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/mediatek/mt7622/mt7622_rfb.c b/board/mediatek/mt7622/mt7622_rfb.c
index 0504d6177fd..ff233e920a0 100644
--- a/board/mediatek/mt7622/mt7622_rfb.c
+++ b/board/mediatek/mt7622/mt7622_rfb.c
@@ -14,7 +14,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	return 0;
 }
 
diff --git a/board/mediatek/mt7623/mt7623_rfb.c b/board/mediatek/mt7623/mt7623_rfb.c
index 755e879085c..ec10f77c51e 100644
--- a/board/mediatek/mt7623/mt7623_rfb.c
+++ b/board/mediatek/mt7623/mt7623_rfb.c
@@ -12,7 +12,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/mediatek/mt7629/mt7629_rfb.c b/board/mediatek/mt7629/mt7629_rfb.c
index d1bca6d62ef..55f7696c510 100644
--- a/board/mediatek/mt7629/mt7629_rfb.c
+++ b/board/mediatek/mt7629/mt7629_rfb.c
@@ -11,7 +11,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/mediatek/mt8518/mt8518_ap1.c b/board/mediatek/mt8518/mt8518_ap1.c
index fce5de6767c..2490b15ec78 100644
--- a/board/mediatek/mt8518/mt8518_ap1.c
+++ b/board/mediatek/mt8518/mt8518_ap1.c
@@ -14,7 +14,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	debug("gd->fdt_blob is %p\n", gd->fdt_blob);
 	return 0;
diff --git a/board/mscc/jr2/jr2.c b/board/mscc/jr2/jr2.c
index 6abf08bd24c..84b95be648d 100644
--- a/board/mscc/jr2/jr2.c
+++ b/board/mscc/jr2/jr2.c
@@ -28,7 +28,7 @@ int board_early_init_r(void)
 			ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
 
 	/* Address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE;
 
 	return 0;
 }
diff --git a/board/mscc/luton/luton.c b/board/mscc/luton/luton.c
index 76e3f2ebbce..48170b3aa12 100644
--- a/board/mscc/luton/luton.c
+++ b/board/mscc/luton/luton.c
@@ -29,7 +29,7 @@ int board_early_init_r(void)
 	writel(0, BASE_CFG + ICPU_SW_MODE);
 
 	/* Address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE;
 
 	return 0;
 }
diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c
index 2a75ec281cb..f261346b358 100644
--- a/board/mscc/ocelot/ocelot.c
+++ b/board/mscc/ocelot/ocelot.c
@@ -77,7 +77,7 @@ int board_early_init_r(void)
 			ICPU_GENERAL_CTRL_IF_SI_OWNER(2));
 
 	/* Address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE;
 
 	return 0;
 }
diff --git a/board/mscc/serval/serval.c b/board/mscc/serval/serval.c
index 87e79076574..99d5f5be657 100644
--- a/board/mscc/serval/serval.c
+++ b/board/mscc/serval/serval.c
@@ -22,7 +22,7 @@ int board_early_init_r(void)
 	writel(0, BASE_CFG + ICPU_SW_MODE);
 
 	/* Address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE;
 
 	return 0;
 }
diff --git a/board/mscc/servalt/servalt.c b/board/mscc/servalt/servalt.c
index bd8c7e8b700..49993168c23 100644
--- a/board/mscc/servalt/servalt.c
+++ b/board/mscc/servalt/servalt.c
@@ -22,7 +22,7 @@ int board_early_init_r(void)
 	writel(0, BASE_CFG + ICPU_SW_MODE);
 
 	/* Address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE;
 
 	return 0;
 }
diff --git a/board/phytec/phycore_am335x_r2/board.c b/board/phytec/phycore_am335x_r2/board.c
index d97ebd01512..e84dd251c25 100644
--- a/board/phytec/phycore_am335x_r2/board.c
+++ b/board/phytec/phycore_am335x_r2/board.c
@@ -166,7 +166,7 @@ void sdram_init(void)
 		   0);
 
 	/* Detect memory physically present */
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
 				    CONFIG_MAX_RAM_BANK_SIZE);
 
 	/* Reconfigure memory for actual detected size */
@@ -269,7 +269,7 @@ void set_mux_conf_regs(void)
  */
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	return 0;
 }
 
diff --git a/board/phytium/pomelo/pomelo.c b/board/phytium/pomelo/pomelo.c
index 4fbe1e58358..75d2636bf45 100644
--- a/board/phytium/pomelo/pomelo.c
+++ b/board/phytium/pomelo/pomelo.c
@@ -24,7 +24,7 @@ int dram_init(void)
 	ddr_init();
 
 	gd->mem_clk = 0;
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 0x7b000000);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, 0x7b000000);
 
 	sec_init();
 	debug("PBF relocate done\n");
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index 3b60afc59c3..85fbaf0b28b 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -70,7 +70,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	/* Force ethernet PHY out of reset */
 	gpio_request(ETHERNET_PHY_RESET, "phy_reset");
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index a36526986ca..ea090575fb2 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -312,7 +312,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 6197e549c2e..2d1435acff6 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -78,7 +78,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	/* Force ethernet PHY out of reset */
 	gpio_request(ETHERNET_PHY_RESET, "phy_reset");
diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c
index 199ec4a3109..f609e4f0728 100644
--- a/board/renesas/grpeach/grpeach.c
+++ b/board/renesas/grpeach/grpeach.c
@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
+	gd->bd->bi_boot_params = (CFG_SYS_SDRAM_BASE + 0x100);
 
 	return 0;
 }
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index 87607df20d5..c3ebcd3e39f 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -80,7 +80,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	/* Force ethernet PHY out of reset */
 	gpio_request(ETHERNET_PHY_RESET, "phy_reset");
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 8e24ac013c0..1437875cfa7 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -89,7 +89,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	/* Force ethernet PHY out of reset */
 	gpio_request(ETHERNET_PHY_RESET, "phy_reset");
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index 1a3a4c11a17..db1fb4b035f 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -78,7 +78,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	/* Force ethernet PHY out of reset */
 	gpio_request(ETHERNET_PHY_RESET, "phy_reset");
diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
index 4558070af88..6ecebfe814d 100644
--- a/board/renesas/silk/silk.c
+++ b/board/renesas/silk/silk.c
@@ -71,7 +71,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	/* Force ethernet PHY out of reset */
 	gpio_request(ETHERNET_PHY_RESET, "phy_reset");
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 56bdb34329a..f069eccde97 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -88,7 +88,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	cpld_init();
 
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index 23b55e3e030..c56582a1948 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -126,7 +126,7 @@ int board_init(void)
 	/* arch number of AT91SAM9M10G45EK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_PM9G45;
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_CMD_NAND
 	pm9g45_nand_hw_init();
@@ -141,15 +141,15 @@ int board_init(void)
 int dram_init(void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
 int dram_init_banksize(void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = CFG_SYS_SDRAM_SIZE;
 
 	return 0;
 }
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 5320c1f2e0a..a992dc68429 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -46,7 +46,7 @@ int dram_init(void)
 	u32 addr;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		addr = CFG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
 		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
 	}
 	return 0;
@@ -64,7 +64,7 @@ int dram_init_banksize(void)
 	u32 addr, size;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		addr = CFG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
 		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
 
 		gd->bd->bi_dram[i].start = addr;
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 943b498293b..16ce5cb8925 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -122,7 +122,7 @@ int dram_init(void)
 	unsigned long addr;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		addr = CFG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
 		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
 	}
 	return 0;
@@ -134,7 +134,7 @@ int dram_init_banksize(void)
 	unsigned long addr, size;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		addr = CFG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
 		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
 
 		gd->bd->bi_dram[i].start = addr;
diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
index 4c655dfd495..8b953f9b397 100644
--- a/board/sandbox/sandbox.c
+++ b/board/sandbox/sandbox.c
@@ -115,7 +115,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
 
 int dram_init(void)
 {
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	gd->ram_size = CFG_SYS_SDRAM_SIZE;
 	return 0;
 }
 
@@ -173,7 +173,7 @@ int board_late_init(void)
 int init_addr_map(void)
 {
 	if (IS_ENABLED(CONFIG_ADDR_MAP))
-		addrmap_set_entry(0, 0, CONFIG_SYS_SDRAM_SIZE, 0);
+		addrmap_set_entry(0, 0, CFG_SYS_SDRAM_SIZE, 0);
 
 	return 0;
 }
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 85025f20efa..2efede62aa5 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -85,7 +85,7 @@ int board_init(void)
 #ifdef CONFIG_MACH_TYPE
 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
 #endif
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_FACTORYSET
 	factoryset_read_eeprom(FACTORYSET_EEPROM_ADDR);
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index d87628097d0..569b86db00a 100644
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -262,7 +262,7 @@ void at91_udp_hw_init(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	/* we have to request the gpios again after relocation */
 	corvus_request_gpio();
@@ -287,8 +287,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c
index b965ae9fa49..8f4b0eae495 100644
--- a/board/siemens/iot2050/board.c
+++ b/board/siemens/iot2050/board.c
@@ -146,7 +146,7 @@ int dram_init_banksize(void)
 	dram_init();
 
 	/* Bank 0 declares the memory available in the DDR low region */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
 
 	/* Bank 1 declares the memory available in the DDR high region */
diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c
index ce6c877959a..3d0f7341a37 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -167,7 +167,7 @@ int board_init(void)
 #endif
 
 	/* Adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	smartweb_nand_hw_init();
 	smartweb_macb_hw_init();
@@ -177,8 +177,8 @@ int board_init(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size(
-		(void *)CONFIG_SYS_SDRAM_BASE,
-		CONFIG_SYS_SDRAM_SIZE);
+		(void *)CFG_SYS_SDRAM_BASE,
+		CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index 47d3f6aef22..1eee972d49e 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -185,8 +185,8 @@ void mem_init(void)
 	sdramc_configure(AT91_SDRAMC_NC_10);
 
 	/* Do memtest for 128MB */
-	ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				CONFIG_SYS_SDRAM_SIZE);
+	ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				CFG_SYS_SDRAM_SIZE);
 
 	/*
 	 * If 32MB or 16MB should be supported check also for
@@ -306,7 +306,7 @@ struct at91_udc_data board_udc_data  = {
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	taurus_request_gpio();
 #ifdef CONFIG_CMD_NAND
@@ -326,8 +326,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c
index a218278cb34..79e492f0a8e 100644
--- a/board/sipeed/maix/maix.c
+++ b/board/sipeed/maix/maix.c
@@ -11,7 +11,7 @@
 
 phys_size_t get_effective_memsize(void)
 {
-	return CONFIG_SYS_SDRAM_SIZE;
+	return CFG_SYS_SDRAM_SIZE;
 }
 
 static int sram_init(void)
diff --git a/board/socrates/sdram.c b/board/socrates/sdram.c
index 04527cf79ab..ad49999dc28 100644
--- a/board/socrates/sdram.c
+++ b/board/socrates/sdram.c
@@ -51,11 +51,11 @@ phys_size_t fixed_sdram(void)
 	asm ("sync; isync; msync");
 	udelay(1000);
 
-	if (get_ram_size(0, CONFIG_SYS_SDRAM_SIZE<<20) == CONFIG_SYS_SDRAM_SIZE<<20) {
+	if (get_ram_size(0, CFG_SYS_SDRAM_SIZE<<20) == CFG_SYS_SDRAM_SIZE<<20) {
 		/*
 		 * OK, size detected -> all done
 		 */
-		return CONFIG_SYS_SDRAM_SIZE<<20;
+		return CFG_SYS_SDRAM_SIZE<<20;
 	}
 
 	return 0;				/* nothing found !		*/
diff --git a/board/softing/vining_fpga/socfpga.c b/board/softing/vining_fpga/socfpga.c
index 22992273911..b3f9550742e 100644
--- a/board/softing/vining_fpga/socfpga.c
+++ b/board/softing/vining_fpga/socfpga.c
@@ -30,7 +30,7 @@ int board_late_init(void)
 	status_led_set(2, CONFIG_LED_STATUS_ON);
 
 	/* Address of boot parameters for ATAG (if ATAG is used) */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 	ret = gpio_request(usb_nrst_gpio, "usb_nrst_gpio");
 	if (!ret)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 8e80ca6e17e..7c44379ec4a 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -107,7 +107,7 @@ int dram_init(void)
 {
 	u32 max_size = imx_ddr_size();
 
-	gd->ram_size = get_ram_size_stride_test((u32 *) CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size_stride_test((u32 *) CFG_SYS_SDRAM_BASE,
 						(u32)max_size);
 
 	return 0;
@@ -288,7 +288,7 @@ int board_init(void)
 	int ret = 0;
 
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_VIDEO_IPUV3
 	ret = setup_display();
diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c
index beab4e9d188..5426fc4ffd8 100644
--- a/board/sysam/amcore/amcore.c
+++ b/board/sysam/amcore/amcore.c
@@ -88,7 +88,7 @@ int dram_init(void)
 	 */
 	out_be32(&dc->dacr0, 0x00003304);
 
-	dramsize = ((CONFIG_SYS_SDRAM_SIZE)-1) & 0xfffc0000;
+	dramsize = ((CFG_SYS_SDRAM_SIZE)-1) & 0xfffc0000;
 	out_be32(&dc->dmr0,  dramsize|1);
 
 	/* issue a PRECHARGE ALL */
@@ -102,8 +102,8 @@ int dram_init(void)
 	out_be32(&dc->dacr0, 0x0000b344);
 	out_be32((u32 *)0x00000c00, 0xbeaddeed);
 
-	gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size(CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/board/sysam/stmark2/stmark2.c b/board/sysam/stmark2/stmark2.c
index d48da48b69d..475e3edfa62 100644
--- a/board/sysam/stmark2/stmark2.c
+++ b/board/sysam/stmark2/stmark2.c
@@ -35,7 +35,7 @@ int dram_init(void)
 	 * Serial Boot: The dram is already initialized in start.S
 	 * only require to return DRAM size
 	 */
-	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
+	dramsize = CFG_SYS_SDRAM_SIZE * 0x100000;
 
 	gd->ram_size = dramsize;
 
diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c
index 3a447ca8a93..8d9eedb7523 100644
--- a/board/tbs/tbs2910/tbs2910.c
+++ b/board/tbs/tbs2910/tbs2910.c
@@ -144,7 +144,7 @@ static const struct boot_mode board_boot_modes[] = {
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_VIDEO_IPUV3
 	setup_display();
diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c
index b7ddc3ba78f..839a692ce85 100644
--- a/board/tcl/sl50/board.c
+++ b/board/tcl/sl50/board.c
@@ -238,7 +238,7 @@ int board_init(void)
 	hw_watchdog_init();
 #endif
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	return 0;
 }
 
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index b97fedddd5e..9e582816115 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -704,7 +704,7 @@ int board_init(void)
 	hw_watchdog_init();
 #endif
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 529129ecc76..d0b7a14e0e9 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -639,7 +639,7 @@ int board_init(void)
 	u32 mreqprio_0, mreqprio_1, modena_init0_bw_fractional,
 	    modena_init0_bw_integer, modena_init0_watermark_0;
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	gpmc_init();
 
 	/*
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index cfc825e52a3..652c40f55c4 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -661,7 +661,7 @@ bool am571x_idk_needs_lcd(void)
 int board_init(void)
 {
 	gpmc_init();
-	gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
+	gd->bd->bi_boot_params = (CFG_SYS_SDRAM_BASE + 0x100);
 
 	return 0;
 }
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 34ec3915f3d..b266ccb4b82 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -75,13 +75,13 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 int dram_init_banksize(void)
 {
 	/* Bank 0 declares the memory available in the DDR low region */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x80000000;
 	gd->ram_size = 0x80000000;
 
 #ifdef CONFIG_PHYS_64BIT
 	/* Bank 1 declares the memory available in the DDR high region */
-	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+	gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
 	gd->bd->bi_dram[1].size = 0x80000000;
 	gd->ram_size = 0x100000000;
 #endif
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index a854d615c1d..1c00e253ffc 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -644,7 +644,7 @@ int dram_init_banksize(void)
 
 	ram_size = board_ti_get_emif_size();
 
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = get_effective_memsize();
 	if (ram_size > CONFIG_MAX_MEM_MAPPED) {
 		gd->bd->bi_dram[1].start = 0x200000000;
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index d6e431ead0e..d4e672a7acd 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -71,13 +71,13 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 int dram_init_banksize(void)
 {
 	/* Bank 0 declares the memory available in the DDR low region */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x80000000;
 	gd->ram_size = 0x80000000;
 
 #ifdef CONFIG_PHYS_64BIT
 	/* Bank 1 declares the memory available in the DDR high region */
-	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+	gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
 	gd->bd->bi_dram[1].size = 0x80000000;
 	gd->ram_size = 0x100000000;
 #endif
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index e09adc8ad34..4d28582311b 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -60,13 +60,13 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 int dram_init_banksize(void)
 {
 	/* Bank 0 declares the memory available in the DDR low region */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x7fffffff;
 	gd->ram_size = 0x80000000;
 
 #ifdef CONFIG_PHYS_64BIT
 	/* Bank 1 declares the memory available in the DDR high region */
-	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+	gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
 	gd->bd->bi_dram[1].size = 0x37fffffff;
 	gd->ram_size = 0x400000000;
 #endif
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 51e8de4b891..34818736a4f 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -46,7 +46,7 @@ int dram_init(void)
 
 	ddr3_size = ddr3_init();
 
-	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
 				    CONFIG_MAX_RAM_BANK_SIZE);
 #if defined(CONFIG_TI_AEMIF)
 	if (!(board_is_k2g_ice() || board_is_k2g_i1()))
@@ -71,7 +71,7 @@ struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 	return 0;
 }
 
@@ -120,7 +120,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 
 	/* adjust memory start address for LPAE */
 	if (lpae) {
-		start[0] -= CONFIG_SYS_SDRAM_BASE;
+		start[0] -= CFG_SYS_SDRAM_BASE;
 		start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
 	}
 
@@ -174,11 +174,11 @@ void ft_board_setup_ex(void *blob, struct bd_info *bd)
 					    "linux,initrd-end", NULL);
 			if (prop1 && prop2) {
 				initrd_start = __be64_to_cpu(*prop1);
-				initrd_start -= CONFIG_SYS_SDRAM_BASE;
+				initrd_start -= CFG_SYS_SDRAM_BASE;
 				initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
 				initrd_start = __cpu_to_be64(initrd_start);
 				initrd_end = __be64_to_cpu(*prop2);
-				initrd_end -= CONFIG_SYS_SDRAM_BASE;
+				initrd_end -= CFG_SYS_SDRAM_BASE;
 				initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
 				initrd_end = __cpu_to_be64(initrd_end);
 
@@ -221,7 +221,7 @@ void ft_board_setup_ex(void *blob, struct bd_info *bd)
 			*reserve_start = __cpu_to_be64(*reserve_start);
 			size = __cpu_to_be64(*(reserve_start + 1));
 			if (size) {
-				*reserve_start -= CONFIG_SYS_SDRAM_BASE;
+				*reserve_start -= CFG_SYS_SDRAM_BASE;
 				*reserve_start +=
 					CONFIG_SYS_LPAE_SDRAM_BASE;
 				*reserve_start =
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
index 2d42af6b809..8c708355d4c 100644
--- a/board/ti/ti816x/evm.c
+++ b/board/ti/ti816x/evm.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 #if defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
diff --git a/board/timll/devkit3250/devkit3250.c b/board/timll/devkit3250/devkit3250.c
index 9d4ffb0f979..efef855b3d0 100644
--- a/board/timll/devkit3250/devkit3250.c
+++ b/board/timll/devkit3250/devkit3250.c
@@ -56,7 +56,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params  = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params  = CFG_SYS_SDRAM_BASE + 0x100;
 
 #ifdef CONFIG_SYS_FLASH_CFI
 	/* Use 16-bit memory interface for NOR Flash */
@@ -76,8 +76,8 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 96d0185329d..3c7cfa309c1 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -79,7 +79,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int dram_init(void)
 {
 	/* use the DDR controllers configured size */
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
 				    (ulong)imx_ddr_size());
 
 	return 0;
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index 475250d8013..65e0e9a156a 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -73,7 +73,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int dram_init(void)
 {
 	/* use the DDR controllers configured size */
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
 				    (ulong)imx_ddr_size());
 
 	return 0;
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index 07fe4544718..f335d5b4f4a 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -266,7 +266,7 @@ int board_init(void)
 	hw_watchdog_init();
 #endif
 
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
diff --git a/board/work-microwave/work_92105/work_92105.c b/board/work-microwave/work_92105/work_92105.c
index 5d12f84cfea..c8e791a4da8 100644
--- a/board/work-microwave/work_92105/work_92105.c
+++ b/board/work-microwave/work_92105/work_92105.c
@@ -67,15 +67,15 @@ int board_init(void)
 {
 	reset_periph();
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params  = CONFIG_SYS_SDRAM_BASE + 0x100;
+	gd->bd->bi_boot_params  = CFG_SYS_SDRAM_BASE + 0x100;
 
 	return 0;
 }
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 17ee541bd84..df4c4576723 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -105,7 +105,7 @@ int board_late_init(void)
 	return board_late_init_xilinx();
 }
 
-#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
+#if !defined(CFG_SYS_SDRAM_BASE) && !defined(CFG_SYS_SDRAM_SIZE)
 int dram_init_banksize(void)
 {
 	return fdtdec_setup_memory_banksize();
@@ -123,8 +123,8 @@ int dram_init(void)
 #else
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 
 	zynq_ddrc_init();
 
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 579708d2e0c..e3f70c4caf4 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -236,7 +236,7 @@ unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
 	return ret;
 }
 
-#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
+#if !defined(CFG_SYS_SDRAM_BASE) && !defined(CFG_SYS_SDRAM_SIZE)
 int dram_init_banksize(void)
 {
 	int ret;
@@ -261,7 +261,7 @@ int dram_init(void)
 #else
 int dram_init_banksize(void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = get_effective_memsize();
 
 	mem_map_fill();
@@ -271,8 +271,8 @@ int dram_init_banksize(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
-				    CONFIG_SYS_SDRAM_SIZE);
+	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+				    CFG_SYS_SDRAM_SIZE);
 
 	return 0;
 }
author	Tom Rini <trini@konsulko.com>	2022-11-16 13:10:37 -0500
committer	Tom Rini <trini@konsulko.com>	2022-12-05 16:06:07 -0500
commit	aa6e94deabb45154cea07ad44c4a5c047bca078b (patch)
tree	1131ae8e3635f3d0c91f8df892ab05e4d9595785 /board
parent	aec118ebe63f7f0ab60916f9906fb3cb680abf7a (diff)