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authorTom Rini <trini@konsulko.com>2025-12-18 08:06:10 -0600
committerTom Rini <trini@konsulko.com>2025-12-18 08:06:10 -0600
commit930eff5416ea98ebd09cec73f5d06a7033b4d52e (patch)
tree55a54df2e4ee0314b1180d033c7a7bb34726b47a /boot
parenta333d9e59f6675c9541c34643f334dbf50898647 (diff)
parent6f419247baa45917fcdd67062e271b8884d8c7aa (diff)
Merge tag 'u-boot-socfpga-next-20251217' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
This pull request brings together a set of fixes and enhancements across the SoCFPGA platform family, with a focus on MMC/SPL robustness, EFI boot enablement, and Agilex5 SD/eMMC support. CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/28776 Highlights: * SPL / MMC: o Fix Kconfig handling for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE o Correct raw sector calculations and respect explicit sector values when loading U-Boot from MMC in SPL o Adjust raw MMC loading logic for SoCFPGA platforms * EFI boot: o Permit EFI booting on SoCFPGA platforms o Disable mkeficapsule tool build for Arria 10 where unsupported * Agilex5: o Upgrade SDHCI controller from SD4HC to SD6HC o Enable MMC and Cadence SDHCI support in defconfig o Add dedicated eMMC device tree and defconfig for Agilex5 SoCDK o Revert incorrect GPIO configuration for SDIO_SEL o Refine U-Boot DT handling for SD and eMMC boot variants * SPI: o Allow disabling the DesignWare SPI driver in SPL via Kconfig * Board / configuration fixes: o Enable random MAC address generation for Cyclone V o Fix DE0-Nano-SoC boot configuration o Remove obsolete or conflicting options from multiple legacy SoCFPGA defconfigs
Diffstat (limited to 'boot')
-rw-r--r--boot/Kconfig3
1 files changed, 3 insertions, 0 deletions
diff --git a/boot/Kconfig b/boot/Kconfig
index da2482f7ef8..1306fc076f0 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -249,6 +249,9 @@ config SPL_LOAD_FIT_ADDRESS
hex "load address of fit image"
depends on SPL_LOAD_FIT
default 0x44000000 if ARCH_IMX8M
+ default 0x60080000 if ARCH_ROCKCHIP && SPL_TEXT_BASE = 0x60000000
+ default 0x40200000 if ARCH_ROCKCHIP && SPL_TEXT_BASE = 0x40000000
+ default 0x00200000 if ARCH_ROCKCHIP && SPL_TEXT_BASE = 0x00000000
default 0x0
help
Specify the load address of the fit image that will be loaded