diff options
author | Tom Rini <trini@konsulko.com> | 2024-09-10 07:50:05 -0600 |
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committer | Tom Rini <trini@konsulko.com> | 2024-09-10 07:50:05 -0600 |
commit | 40727391702a1a48c58b0a3c6e69013ff8af6cb2 (patch) | |
tree | 84b20693c9f3dd5d5cc831d0b999bd5523523c35 /cmd/riscv/exception.c | |
parent | aded8e4aaee1efa32f2ce7e3c45205f523afc2da (diff) | |
parent | 1806fed0ce6b56365ecf6b84ce6d17aafd3af979 (diff) |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/22292
- Add rdcycle to RISC-V exception command
- Some fixes and refactoring
Diffstat (limited to 'cmd/riscv/exception.c')
-rw-r--r-- | cmd/riscv/exception.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c index 2b58b1c449c..16e335327f1 100644 --- a/cmd/riscv/exception.c +++ b/cmd/riscv/exception.c @@ -36,6 +36,14 @@ static int do_ialign16(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; } +static int do_rdcycle(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + printf("cycle = 0x%lx\n", csr_read(CSR_CYCLE)); + + return CMD_RET_SUCCESS; +} + static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -62,6 +70,8 @@ static struct cmd_tbl cmd_sub[] = { "", ""), U_BOOT_CMD_MKENT(ialign16, CONFIG_SYS_MAXARGS, 1, do_ialign16, "", ""), + U_BOOT_CMD_MKENT(rdcycle, CONFIG_SYS_MAXARGS, 1, do_rdcycle, + "", ""), U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned, "", ""), U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined, @@ -74,7 +84,8 @@ U_BOOT_LONGHELP(exception, " compressed - compressed instruction\n" " ebreak - breakpoint\n" " ialign16 - 16 bit aligned instruction\n" - " undefined - illegal instruction\n" - " unaligned - load address misaligned\n"); + " rdcycle - read cycle CSR\n" + " unaligned - load address misaligned\n" + " undefined - illegal instruction\n"); #include <exception.h> |