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authorTom Rini <trini@konsulko.com>2019-12-18 07:20:19 -0500
committerTom Rini <trini@konsulko.com>2019-12-18 07:20:19 -0500
commitc0912f9bbfb26dd03d189953678691b799d35b6e (patch)
treef879600cd26b8d4678a174854b623941e5dc2ada /common/spl/spl.c
parent533c9f5714bdba79dc6f2629284d4c1a08a611d1 (diff)
parenta1d6dc3f84071f05574044f337dbdca70fae495d (diff)
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next
- Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral
Diffstat (limited to 'common/spl/spl.c')
-rw-r--r--common/spl/spl.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/common/spl/spl.c b/common/spl/spl.c
index d51dbe9942f..c1fce62b914 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -42,6 +42,12 @@ u32 *boot_params_ptr = NULL;
/* See spl.h for information about this */
binman_sym_declare(ulong, u_boot_any, image_pos);
+binman_sym_declare(ulong, u_boot_any, size);
+
+#ifdef CONFIG_TPL
+binman_sym_declare(ulong, spl, image_pos);
+binman_sym_declare(ulong, spl, size);
+#endif
/* Define board data structure */
static bd_t bdata __attribute__ ((section(".data")));
@@ -120,6 +126,20 @@ void spl_fixup_fdt(void)
#endif
}
+ulong spl_get_image_pos(void)
+{
+ return spl_phase() == PHASE_TPL ?
+ binman_sym(ulong, spl, image_pos) :
+ binman_sym(ulong, u_boot_any, image_pos);
+}
+
+ulong spl_get_image_size(void)
+{
+ return spl_phase() == PHASE_TPL ?
+ binman_sym(ulong, spl, size) :
+ binman_sym(ulong, u_boot_any, size);
+}
+
/*
* Weak default function for board specific cleanup/preparation before
* Linux boot. Some boards/platforms might not need it, so just provide