diff options
| author | Tom Rini <trini@konsulko.com> | 2023-01-20 14:21:38 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-01-20 14:21:38 -0500 |
| commit | 0b9b01517f0b1398ec27dbb47faf3645b719e02c (patch) | |
| tree | fac11441ba4056e75d3b59811da3b0a91d1cfcf5 /doc/README.socfpga | |
| parent | 8bd3c0a7e17ee17c771cabc0e548a1a436ac021d (diff) | |
| parent | 6333acb961b6fcaa60c6e5b623d676b332481cfa (diff) | |
Merge branch '2023-01-20-finish-CONFIG-migration-work'
- Merge in the final batch of CONFIG to Kconfig/CFG migration work. This
includes a fix for a number of ns16550 or similar UARTs due to a
migration bug. We also pull in a revert for enabling CONFIG_VIDEO on
tools-only_defconfig.
Diffstat (limited to 'doc/README.socfpga')
| -rw-r--r-- | doc/README.socfpga | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/doc/README.socfpga b/doc/README.socfpga index 4d73398eb97..e5adb62102b 100644 --- a/doc/README.socfpga +++ b/doc/README.socfpga @@ -6,16 +6,6 @@ This README is about U-Boot and SPL support for Altera's ARM Cortex-A9MPCore based SOCFPGA. To know more about the hardware itself, please refer to www.altera.com. - -socfpga_dw_mmc --------------- - -Here are macro and detailed configuration required to enable DesignWare SDMMC -controller support within SOCFPGA - -#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 --> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM - --------------------------------------------------------------------- Cyclone 5 / Arria 5 generating the handoff header files for U-Boot SPL --------------------------------------------------------------------- |