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authorSebastian Kropatsch <seb-dev@mail.de>2024-07-14 23:23:43 +0200
committerKever Yang <kever.yang@rock-chips.com>2024-07-17 14:48:18 +0800
commit9a48ec3e91c6fbdb8d67dfd80488def8fa61b681 (patch)
tree916ebd621931decda1eefa51dd482435166a6a5d /doc/conf.py
parentee84a18b3d7fd5aca41f06765fe8027519b2e176 (diff)
phy: rockchip: snps-pcie3: Fix clearing PHP_GRF_PCIESEL_CON bits
The pcie1ln_sel bits for the RK3588 are getting set but not cleared due to an incorrect write mask. Use a newly introduced constant for the write mask to fix this. Also introduce a GENMASK-based constant for PCIE30_PHY_MODE. This fix is adapted from the upstream Linux commit by Sebastian Reichel: 55491a5fa163 ("phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits") Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588") Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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