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authorBin Meng <bmeng@tinylab.org>2023-06-27 09:24:56 +0800
committerLeo Yu-Chi Liang <ycliang@andestech.com>2023-06-27 10:09:51 +0800
commit4a3efd71cd858b87527e9478ff51529d39329819 (patch)
treed18d6192b5d60e176e98fd2acefbfb580d5bcf1e /doc/usage/cmd/source.rst
parent217b6373b57ce815b79f05dddd3203984994ad96 (diff)
riscv: Fix alignment of RELA sections in the linker scripts
In current linker script both .efi_runtime_rel and .rela.dyn sections are of RELA type whose entry size is either 12 (RV32) or 24 (RV64). These two are arranged as a continuous region on purpose so that the prelink-riscv executable can fix up the PIE addresses in one loop. However there is an 'ALIGN(8)' between these 2 sections which might cause a gap to be inserted between these 2 sections to satisfy the alignment requirement on RV32. This would break the assumption of the prelink process and generate an unbootable image. Fixes: 9a6569a043d3 ("riscv: Update alignment for some sections in linker scripts") Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com>
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