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| author | Jonas Karlman <jonas@kwiboo.se> | 2024-02-17 12:34:04 +0000 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2024-03-14 11:48:40 +0800 |
| commit | 6d8cdfd15367b9ed0f8c9458a0f9a9962a767000 (patch) | |
| tree | d9355c7b74af6510137f4dbe54a1389164d8a8c1 /drivers/adc/stm32-adc-core.c | |
| parent | 3e15dee38d45985b2ad666909720df1b4d412a98 (diff) | |
rockchip: spl: Enable caches to speed up checksum validation
FIT checksum validation is very slow in SPL due to D-cache not being
enabled.
Enable caches in SPL on ARM64 SoCs to speed up FIT checksum validation,
from seconds to milliseconds.
This change enables caches in SPL on all Rockchip ARM64 boards, the
Kconfig options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be used to
disable caches for a specific board or SoC if needed.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/adc/stm32-adc-core.c')
0 files changed, 0 insertions, 0 deletions