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authorNeha Malcom Francis <n-francis@ti.com>2024-01-30 15:53:56 +0530
committerTom Rini <trini@konsulko.com>2024-02-06 16:31:06 -0500
commit94cfc6fc96d2e718026d6aed9471994489a192f0 (patch)
tree05592b9429492b25f65c21d094e76e236cef3ed4 /drivers/button/button-qcom-pmic.c
parent4312a1dfca26a0b5c30ac6890b0078e8d31ff6bf (diff)
arm: mach-k3: j721s2_init: Support less than max DDR controllers
The number of DDR controllers to be initialised and used should depend on the device tree with the constraint of the maximum number of controllers the device supports. Since J721S2 has multiple (2) controllers, instead of hardcoding the number of probes, move to depending on the device tree UCLASS_RAM nodes present. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Diffstat (limited to 'drivers/button/button-qcom-pmic.c')
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