diff options
| author | Tom Rini <trini@konsulko.com> | 2018-01-26 07:46:34 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-26 07:46:34 -0500 |
| commit | 1d12a7c8cd4e58d5c3989bc239d5fa9577079dfd (patch) | |
| tree | 00550f8c91498b648d95c0c1c9f642deb324c4a5 /drivers/clk/clk_pic32.c | |
| parent | a3f77c810b1a57853e4d5fee3014ac8cbbd03a9a (diff) | |
| parent | 58c125b9e2b232ce73ed7b24ba7b1ca5ff41c5bd (diff) | |
Merge git://git.denx.de/u-boot-spi
Diffstat (limited to 'drivers/clk/clk_pic32.c')
| -rw-r--r-- | drivers/clk/clk_pic32.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c index f6eef314ec3..177803943d9 100644 --- a/drivers/clk/clk_pic32.c +++ b/drivers/clk/clk_pic32.c @@ -197,8 +197,8 @@ static ulong pic32_set_refclk(struct pic32_clk_priv *priv, int periph, writel(REFO_ON | REFO_OE, reg + _CLR_OFFSET); /* wait till previous src change is active */ - wait_for_bit(__func__, reg, REFO_DIVSW_EN | REFO_ACTIVE, - false, CONFIG_SYS_HZ, false); + wait_for_bit_le32(reg, REFO_DIVSW_EN | REFO_ACTIVE, + false, CONFIG_SYS_HZ, false); /* parent_id */ v = readl(reg); @@ -223,8 +223,8 @@ static ulong pic32_set_refclk(struct pic32_clk_priv *priv, int periph, writel(REFO_DIVSW_EN, reg + _SET_OFFSET); /* wait for divider switching to complete */ - return wait_for_bit(__func__, reg, REFO_DIVSW_EN, false, - CONFIG_SYS_HZ, false); + return wait_for_bit_le32(reg, REFO_DIVSW_EN, false, + CONFIG_SYS_HZ, false); } static ulong pic32_get_refclk(struct pic32_clk_priv *priv, int periph) @@ -311,8 +311,8 @@ static int pic32_mpll_init(struct pic32_clk_priv *priv) /* Wait for ready */ mask = MPLL_RDY | MPLL_VREG_RDY; - return wait_for_bit(__func__, priv->syscfg_base + CFGMPLL, mask, - true, get_tbclk(), false); + return wait_for_bit_le32(priv->syscfg_base + CFGMPLL, mask, + true, get_tbclk(), false); } static void pic32_clk_init(struct udevice *dev) |