diff options
| author | Tom Rini <trini@konsulko.com> | 2024-08-02 14:40:59 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-08-02 14:40:59 -0600 |
| commit | 6becf9ba1ab82af6f4fcf9f4d0da38f9c75212d2 (patch) | |
| tree | d684ddd8650880d0792445481c4e7e289fa2e473 /drivers/clk/imx/clk-imx8mp.c | |
| parent | a70d991212c9684e09ed80ece69ce1ff7bfd9f08 (diff) | |
| parent | 0ee02e1c252da85a6ac75865ca33accde69072b7 (diff) | |
Merge tag 'u-boot-imx-master-20240802' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/21846
- Convert warp7 to OF_UPSTREAM.
- Add 'cpu' command to imx8m and imx93.
- Enable CMD_ERASEENV for imx8mm/mp Phytec boards.
Diffstat (limited to 'drivers/clk/imx/clk-imx8mp.c')
| -rw-r--r-- | drivers/clk/imx/clk-imx8mp.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 6b18483c814..34d91cd6880 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -21,6 +21,8 @@ static const char * const sys_pll1_bypass_sels[] = {"sys_pll1", "sys_pll1_ref_se static const char * const sys_pll2_bypass_sels[] = {"sys_pll2", "sys_pll2_ref_sel", }; static const char * const sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; +static const char * const imx8mp_arm_core_sels[] = {"arm_a53_src", "arm_pll_out", }; + static const char * const imx8mp_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; @@ -354,6 +356,12 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_USDHC3_ROOT, imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0)); + clk_dm(IMX8MP_CLK_ARM, + imx_clk_mux2_flags("arm_core", base + 0x9880, 24, 1, + imx8mp_arm_core_sels, + ARRAY_SIZE(imx8mp_arm_core_sels), + CLK_IS_CRITICAL)); + return 0; } |