diff options
| author | Angus Ainslie <angus@akkea.ca> | 2022-03-29 07:02:40 -0700 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2022-04-12 17:33:55 +0200 |
| commit | 129f5102d2941715263fb806b57da5527e7fd9ed (patch) | |
| tree | 8bf73b229f331e830c80ee2c127e8dec44847d6e /drivers/clk/imx/clk-imx8mq.c | |
| parent | 11c8ab01f3ed0b97c3a07b7de0e95793a002bef5 (diff) | |
clk: imx8m: reduce rate table duplication
Re-factor the imx8m[nmpq] rate tables into the common pll1416x clock
driver.
43cdaa1567ad3 ("clk: imx8mm: Move 1443X/1416X PLL clock structure to common place")
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
Diffstat (limited to 'drivers/clk/imx/clk-imx8mq.c')
| -rw-r--r-- | drivers/clk/imx/clk-imx8mq.c | 59 |
1 files changed, 6 insertions, 53 deletions
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index 1aa7c2c86e2..cf197df96db 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -16,53 +16,6 @@ #include "clk.h" -#define PLL_1416X_RATE(_rate, _m, _p, _s) \ - { \ - .rate = (_rate), \ - .mdiv = (_m), \ - .pdiv = (_p), \ - .sdiv = (_s), \ - } - -#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ - { \ - .rate = (_rate), \ - .mdiv = (_m), \ - .pdiv = (_p), \ - .sdiv = (_s), \ - .kdiv = (_k), \ - } - -static const struct imx_pll14xx_rate_table imx8mq_pll1416x_tbl[] = { - PLL_1416X_RATE(1800000000U, 225, 3, 0), - PLL_1416X_RATE(1600000000U, 200, 3, 0), - PLL_1416X_RATE(1200000000U, 300, 3, 1), - PLL_1416X_RATE(1000000000U, 250, 3, 1), - PLL_1416X_RATE(800000000U, 200, 3, 1), - PLL_1416X_RATE(750000000U, 250, 2, 2), - PLL_1416X_RATE(700000000U, 350, 3, 2), - PLL_1416X_RATE(600000000U, 300, 3, 2), -}; - -const struct imx_pll14xx_rate_table imx8mq_pll1443x_tbl[] = { - PLL_1443X_RATE(650000000U, 325, 3, 2, 0), - PLL_1443X_RATE(594000000U, 198, 2, 2, 0), - PLL_1443X_RATE(393216000U, 262, 2, 3, 9437), - PLL_1443X_RATE(361267200U, 361, 3, 3, 17511), -}; - -static struct imx_pll14xx_clk imx8mq_1416x_pll __initdata = { - .type = PLL_1416X, - .rate_table = imx8mq_pll1416x_tbl, - .rate_count = ARRAY_SIZE(imx8mq_pll1416x_tbl), -}; - -static struct imx_pll14xx_clk imx8mq_1443x_pll __initdata = { - .type = PLL_1443X, - .rate_table = imx8mq_pll1443x_tbl, - .rate_count = ARRAY_SIZE(imx8mq_pll1443x_tbl), -}; - static const char *const pll_ref_sels[] = { "clock-osc-25m", "clock-osc-27m", "clock-phy-27m", "dummy", }; static const char *const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; static const char *const gpu_pll_bypass_sels[] = {"gpu_pll", "gpu_pll_ref_sel", }; @@ -229,13 +182,13 @@ static int imx8mq_clk_probe(struct udevice *dev) clk_dm(IMX8MQ_ARM_PLL, imx_clk_pll14xx("arm_pll", "arm_pll_ref_sel", - base + 0x28, &imx8mq_1416x_pll)); + base + 0x28, &imx_1416x_pll)); clk_dm(IMX8MQ_GPU_PLL, imx_clk_pll14xx("gpu_pll", "gpu_pll_ref_sel", - base + 0x18, &imx8mq_1416x_pll)); + base + 0x18, &imx_1416x_pll)); clk_dm(IMX8MQ_VPU_PLL, imx_clk_pll14xx("vpu_pll", "vpu_pll_ref_sel", - base + 0x20, &imx8mq_1416x_pll)); + base + 0x20, &imx_1416x_pll)); clk_dm(IMX8MQ_SYS1_PLL1, clk_register_fixed_rate(NULL, "sys1_pll", 800000000)); @@ -245,13 +198,13 @@ static int imx8mq_clk_probe(struct udevice *dev) clk_register_fixed_rate(NULL, "sys3_pll", 1000000000)); clk_dm(IMX8MQ_AUDIO_PLL1, imx_clk_pll14xx("audio_pll1", "audio_pll1_ref_sel", - base + 0x0, &imx8mq_1443x_pll)); + base + 0x0, &imx_1443x_pll)); clk_dm(IMX8MQ_AUDIO_PLL2, imx_clk_pll14xx("audio_pll2", "audio_pll2_ref_sel", - base + 0x8, &imx8mq_1443x_pll)); + base + 0x8, &imx_1443x_pll)); clk_dm(IMX8MQ_VIDEO_PLL1, imx_clk_pll14xx("video_pll1", "video_pll1_ref_sel", - base + 0x10, &imx8mq_1443x_pll)); + base + 0x10, &imx_1443x_pll)); /* PLL bypass out */ clk_dm(IMX8MQ_ARM_PLL_BYPASS, |