diff options
| author | Oliver Graute <oliver.graute@kococonnector.com> | 2020-11-12 11:51:04 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-12-06 15:07:51 +0100 |
| commit | 61eb1fe56849c1418f35c5a9579047ab113e914f (patch) | |
| tree | 63ef080ae8349c9120bc152ab705527d989d71c7 /drivers/clk/imx/clk-imx8qm.c | |
| parent | 7a8d18da4bb2a92246af1129337164e9a41a9abf (diff) | |
imx: clk: added IPG Clock for I2C on imx8qm
This patch fixes this clk issue on I2C on imx8qm
=> i2c bus
Bus 3: i2c@5a830000
=> i2c dev 3
Setting bus to 3
Failed to enable ipg clk
Failure changing bus number (-524)
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers/clk/imx/clk-imx8qm.c')
| -rw-r--r-- | drivers/clk/imx/clk-imx8qm.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c index 54fb09fda40..7e466d630a0 100644 --- a/drivers/clk/imx/clk-imx8qm.c +++ b/drivers/clk/imx/clk-imx8qm.c @@ -53,19 +53,27 @@ ulong imx8_clk_get_rate(struct clk *clk) resource = SC_R_A53; pm_clk = SC_PM_CLK_CPU; break; + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; @@ -148,19 +156,27 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; @@ -242,19 +258,27 @@ int __imx8_clk_enable(struct clk *clk, bool enable) debug("%s(#%lu)\n", __func__, clk->id); switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; |