diff options
| author | Patrick Delaunay <patrick.delaunay@st.com> | 2019-01-30 13:07:03 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-02-09 07:50:56 -0500 |
| commit | f3a23c26097144de9ad08644a4bfc9c238df873a (patch) | |
| tree | 651de9728b344508bd13cdaef87b4560d9ab0947 /drivers/clk | |
| parent | 63201281e5e51116676bf3a2b028035856d3f2a6 (diff) | |
clk: stm32mp1: recalculate counter when switching freq
Because stgen is initialized with HSI clock, we need to
recalculate the counter when changing frequency.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/clk_stm32mp1.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 39eaf64cdd1..916f9f9e8c0 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -1469,10 +1469,15 @@ static void stgen_config(struct stm32mp1_clk_priv *priv) rate = stm32mp1_clk_get(priv, p); if (cntfid0 != rate) { + u64 counter; + pr_debug("System Generic Counter (STGEN) update\n"); clrbits_le32(stgenc + STGENC_CNTCR, STGENC_CNTCR_EN); - writel(0x0, stgenc + STGENC_CNTCVL); - writel(0x0, stgenc + STGENC_CNTCVU); + counter = (u64)readl(stgenc + STGENC_CNTCVL); + counter |= ((u64)(readl(stgenc + STGENC_CNTCVU))) << 32; + counter = lldiv(counter * (u64)rate, cntfid0); + writel((u32)counter, stgenc + STGENC_CNTCVL); + writel((u32)(counter >> 32), stgenc + STGENC_CNTCVU); writel(rate, stgenc + STGENC_CNTFID0); setbits_le32(stgenc + STGENC_CNTCR, STGENC_CNTCR_EN); |