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authorTom Rini <trini@konsulko.com>2020-07-27 15:18:15 -0400
committerTom Rini <trini@konsulko.com>2020-07-27 15:18:15 -0400
commit8d1fc6fb89826efb6bbbedb57862496e18737877 (patch)
tree8418e5d212ff4f5dfbfaad4eb9c21a63a83e3d9b /drivers/crypto/fsl/desc_constr.h
parentfc3414212effcdd18a7382ffa9e654441bed30a4 (diff)
parent636999f21cdd901f1d78323456447ce956410776 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a - lx2-watchdog support - layerscape: pci-endpoint support, spin table relocation fixes and cleanups - fsl-crypto: RNG support and bug fixes
Diffstat (limited to 'drivers/crypto/fsl/desc_constr.h')
-rw-r--r--drivers/crypto/fsl/desc_constr.h27
1 files changed, 13 insertions, 14 deletions
diff --git a/drivers/crypto/fsl/desc_constr.h b/drivers/crypto/fsl/desc_constr.h
index cb112283aca..b82ba83e73a 100644
--- a/drivers/crypto/fsl/desc_constr.h
+++ b/drivers/crypto/fsl/desc_constr.h
@@ -36,19 +36,16 @@
(LDOFF_ENABLE_AUTO_NFIFO << LDST_OFFSET_SHIFT))
#ifdef CONFIG_PHYS_64BIT
-union ptr_addr_t {
- u64 m_whole;
- struct {
+struct ptr_addr_t {
#ifdef CONFIG_SYS_FSL_SEC_LE
- u32 low;
- u32 high;
+ u32 low;
+ u32 high;
#elif defined(CONFIG_SYS_FSL_SEC_BE)
- u32 high;
- u32 low;
+ u32 high;
+ u32 low;
#else
#error Neither CONFIG_SYS_FSL_SEC_LE nor CONFIG_SYS_FSL_SEC_BE is defined
#endif
- } m_halfs;
};
#endif
@@ -57,9 +54,10 @@ static inline void pdb_add_ptr(dma_addr_t *offset, dma_addr_t ptr)
#ifdef CONFIG_PHYS_64BIT
/* The Position of low and high part of 64 bit address
* will depend on the endianness of CAAM Block */
- union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset;
- ptr_addr->m_halfs.high = (u32)(ptr >> 32);
- ptr_addr->m_halfs.low = (u32)ptr;
+ struct ptr_addr_t *ptr_addr = (struct ptr_addr_t *)offset;
+
+ ptr_addr->high = (u32)(ptr >> 32);
+ ptr_addr->low = (u32)ptr;
#else
*offset = ptr;
#endif
@@ -111,9 +109,10 @@ static inline void append_ptr(u32 *desc, dma_addr_t ptr)
#ifdef CONFIG_PHYS_64BIT
/* The Position of low and high part of 64 bit address
* will depend on the endianness of CAAM Block */
- union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset;
- ptr_addr->m_halfs.high = (u32)(ptr >> 32);
- ptr_addr->m_halfs.low = (u32)ptr;
+ struct ptr_addr_t *ptr_addr = (struct ptr_addr_t *)offset;
+
+ ptr_addr->high = (u32)(ptr >> 32);
+ ptr_addr->low = (u32)ptr;
#else
*offset = ptr;
#endif