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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2021-01-16 00:28:18 +0100 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2021-02-20 22:38:28 +0100 |
| commit | b9616d8f903c8f4c7eac78adc7a8ff41c3099be3 (patch) | |
| tree | 5b1224eeb9d8c7f03e55c31b47248671d0607ac0 /drivers/ddr/altera/sdram_agilex.c | |
| parent | ea966d24ef3a9f7f32712a518a07374f9ae43905 (diff) | |
pci: renesas: Add root bus handling on Gen3
Add code to access the PCIe root bus space and configure it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/ddr/altera/sdram_agilex.c')
0 files changed, 0 insertions, 0 deletions