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| author | Heesub Shin <heesub@gmail.com> | 2024-04-28 23:24:06 +0900 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2024-06-18 08:55:52 +0200 |
| commit | cf03330549562b324302187ee3c3b98a030bac9d (patch) | |
| tree | 2cda15af4bf7e3459e4058adc93f6e25d4d98e4f /drivers/ddr/altera/sdram_agilex.c | |
| parent | 6a4c90093b665b321219e5e93e2467f7597cbb6a (diff) | |
ARM: dts: stm32: add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey
In Odyssey board, we should reset the PHY chipset, toggling G0 pin.
Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_agilex.c')
0 files changed, 0 insertions, 0 deletions