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| author | Baocheng Su <baocheng.su@siemens.com> | 2024-10-22 08:04:21 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-10-28 20:54:23 -0600 |
| commit | 10cf194e496a767684f102bd3717a2118287792c (patch) | |
| tree | 5d0e7307ad64922996801ebe692af88e0159e7a1 /drivers/ddr/altera/sdram_gen5.c | |
| parent | 5b55635ee12dc2223f91550293f4efc86c38ed79 (diff) | |
board: siemens: iot2050: Pass DDR size from FSBL
Due to new DDR size introduction, the current logic of determining the
DDR size is not able to get the correct size.
Instead, the DDR size is determined by the FSBL(SEBOOT) then passed to
u-boot through the scratchpad info.
The SEBoot version must be >= D/V01.04.01.02 to support this change.
Also now for some variants, the DDR size may > 2GB, so borrow some code
from the TI evm to iot2050 to support more than 2GB DDR.
Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_gen5.c')
0 files changed, 0 insertions, 0 deletions