diff options
| author | Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> | 2025-08-03 18:24:45 -0700 |
|---|---|---|
| committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2025-08-08 22:20:50 +0800 |
| commit | 71916a72f106ed2aaae5a49885fb86623e5f7aec (patch) | |
| tree | 93492570b5ff220195395e3a98442106e6f6704a /drivers/ddr/altera/sdram_gen5.c | |
| parent | c8f5166cff0ccdb1966ed786dba88e9548ce632e (diff) | |
arm: socfpga: soc64: Perform warm reset after L2 reset in SPL
SPL checks for a magic word in the system manager's scratch
register to determine if an L2 reset has occurred. If detected,
SPL places all slave CPUs (CPU1–3) into WFI mode. The master
CPU (CPU0) then initiates a warm reset by writing to the RMR_EL3
system register and also enters WFI mode.
This warm reset flow is handled entirely within the HPS. The
function `socfpga_sysreset_request()` triggers the warm
reset, and upon SPL re-entry, the updated `lowlevel_init_soc64.S`
handles the necessary initialization.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_gen5.c')
0 files changed, 0 insertions, 0 deletions