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author | Andre Przywara <andre.przywara@arm.com> | 2025-01-25 13:40:05 +0000 |
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committer | Andre Przywara <andre.przywara@arm.com> | 2025-07-27 22:57:35 +0100 |
commit | 915ac864f41be0d81f74c26bfc5c43a29bfcda2c (patch) | |
tree | 5301187d70f9fe77947d9d65b54abaee0cb4395c /drivers/ddr/altera/sdram_s10.c | |
parent | ff4dda1db2c6f96582fc1691c4fdb83e957e7666 (diff) |
sunxi: clock: H6: factor out H6/H616 CPU clock setup
When we program the CPU PLL, we need to switch the CPU clock source away
from the PLL temporarily, then switch it back, once the PLL has
stabilised.
The CPU CLK register will be different on the A523, so move the current
code into a separate function, to allow using a different version of
that later for the A523.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_s10.c')
0 files changed, 0 insertions, 0 deletions