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author | Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> | 2025-08-03 18:24:41 -0700 |
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committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2025-08-08 22:20:49 +0800 |
commit | 1e354de7fc36c5cf1f7e77c5dca4713100fbb503 (patch) | |
tree | 2660cc7036772b739c487e0961f12991f05d3d36 /drivers/ddr/altera/sdram_s10.h | |
parent | 209d53eb1b486776dd1a7ad7f8611083fff7ad26 (diff) |
ddr: altera: agilex: Get ACF from boot scratch register
The DDR data rate must be set correctly in the DDRIOCTRL
register according to the Actual Clock Frequency (ACF) value.
By enabling the reading of ACF value from bit 18 of the boot
scratch register during initialization, the DDR data rate is
able to be configured accurately.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_s10.h')
0 files changed, 0 insertions, 0 deletions