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authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>2025-08-03 18:24:28 -0700
committerTien Fong Chee <tien.fong.chee@intel.com>2025-08-08 16:00:16 +0800
commit532fd00bdb763748d1c52f37203f3e04dbd4276a (patch)
tree51a0f102d079e9d954e007a09f9b86126637806b /drivers/ddr/altera/sdram_soc64.c
parent28c06d67cf094fdea48e46bb01af2e9806ccd526 (diff)
drivers: clk: agilex: Use real clock source frequency
Update the ARMv8 generic timer frequency register (cntfrq_el0) with the actual hardware timer frequency (COUNTER_FREQUENCY_REAL). The generic timer frequency was set to 0x200000000 during boot clk which needs to be set to 0x400000000 when transition from boot clk to PLL clk. This will ensure that subsequent timer operations are based on the correct frequency, ensuring accurate timekeeping. Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_soc64.c')
0 files changed, 0 insertions, 0 deletions