diff options
| author | Tingting Meng <tingting.meng@altera.com> | 2025-02-21 21:49:41 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-02-25 10:54:01 -0600 |
| commit | 04ea9147d5bdab1370ced118acf35db7ac9e281c (patch) | |
| tree | b513cab2449c154da3ee1470256507cfd5ea78ea /drivers/ddr/altera/sdram_soc64.h | |
| parent | 034ebe3302200c033078455c5774ed739cd4f2ac (diff) | |
ddr: altera: Add DDR driver for Agilex5 series
Adding DDR driver support for Agilex5 series.
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_soc64.h')
| -rw-r--r-- | drivers/ddr/altera/sdram_soc64.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h index 87a70a861ba..183b1a33080 100644 --- a/drivers/ddr/altera/sdram_soc64.h +++ b/drivers/ddr/altera/sdram_soc64.h @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2017-2019 Intel Corporation <www.intel.com> + * Copyright (C) 2025 Altera Corporation <www.altera.com> + * */ #ifndef _SDRAM_SOC64_H_ @@ -13,11 +15,19 @@ struct altera_sdram_priv { struct reset_ctl_bulk resets; }; +#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5) +struct altera_sdram_plat { + fdt_addr_t mpfe_base_addr; + bool dualport; + bool dualemif; +}; +#else struct altera_sdram_plat { void __iomem *hmc; void __iomem *ddr_sch; void __iomem *iomhc; }; +#endif /* ECC HMC registers */ #define DDRIOCTRL 0x8 |