diff options
author | Marek Vasut <marex@denx.de> | 2019-10-18 00:22:31 +0200 |
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committer | Marek Vasut <marex@denx.de> | 2020-02-05 03:01:57 +0100 |
commit | 9a5a90ad9b3234c4739427cbe11219c51f0e9bd1 (patch) | |
tree | 46b9196f5316689236fd04480c0422077445765d /drivers/ddr/altera/sequencer.h | |
parent | cf89ef8d10f240554541c20b2e1bdcdd58d1d7e6 (diff) |
ddr: altera: Add DDR2 support to Gen5 driver
Add DDR2 support to Gen5 DRAM driver. As the DDR2 macro names generated
by Quartus are named differently than the DDR3 ones, use anon unions to
store them in the same structures, without growing their size.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'drivers/ddr/altera/sequencer.h')
-rw-r--r-- | drivers/ddr/altera/sequencer.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/ddr/altera/sequencer.h b/drivers/ddr/altera/sequencer.h index 4a03c3fdf98..c72a683ffef 100644 --- a/drivers/ddr/altera/sequencer.h +++ b/drivers/ddr/altera/sequencer.h @@ -279,5 +279,6 @@ struct socfpga_sdrseq { }; int sdram_calibration_full(struct socfpga_sdr *sdr); +bool dram_is_ddr(const u8 ddr); #endif /* _SEQUENCER_H_ */ |