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| author | Tom Rini <trini@konsulko.com> | 2022-09-06 08:59:51 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-09-06 08:59:51 -0400 |
| commit | 166d2693dd3447ffa18112611c85ee4bb37ffa4b (patch) | |
| tree | efa16cc06a6aa6f6b67cca5e635014b008aac60a /drivers/ddr/fsl/ctrl_regs.c | |
| parent | 51601397fcbb13e6dc2e4223408230c82955a601 (diff) | |
| parent | 44366be10a9386a8887124a77a7d06169c3aa1f3 (diff) | |
Merge tag 'fsl-qoriq-2022-9-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Reset fixes for p1_p2_rdb_pc
Fix use after free issue fix in fsl_enetc.c
Fix for fsl ddr: make bank_addr_bits reflect actual bits
sl28 board update
Diffstat (limited to 'drivers/ddr/fsl/ctrl_regs.c')
| -rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index b5122d1a1c3..0b0b4e5cb7e 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -214,7 +214,7 @@ static void set_csn_config(int dimm_number, int i, fsl_ddr_cfg_regs_t *ddr, odt_rd_cfg = popts->cs_local_opts[i].odt_rd_cfg; odt_wr_cfg = popts->cs_local_opts[i].odt_wr_cfg; #ifdef CONFIG_SYS_FSL_DDR4 - ba_bits_cs_n = dimm_params[dimm_number].bank_addr_bits; + ba_bits_cs_n = dimm_params[dimm_number].bank_addr_bits - 2; bg_bits_cs_n = dimm_params[dimm_number].bank_group_bits; #else n_banks_per_sdram_device |