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authorAndrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>2022-01-24 21:48:09 +0100
committerStefano Babic <sbabic@denx.de>2022-02-05 15:49:01 +0100
commit1289ff7bd7e4429aabbc33d37c4a93fd1e437d07 (patch)
treee41d3851a8fd08e2f0de620dd456459822e85061 /drivers/ddr/fsl/mpc85xx_ddr_gen1.c
parent3113861bebb09e3ef5c3dbe1798a61757a7e936d (diff)
imx8m: lock id_swap_bypass bit in tzc380 enable
According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in order to avoid AXI bus errors when GPU is enabled on the platform. TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable derivatives, but is missing a lock settings to be applied. Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have it implemented. Since we're here, provide also names to bits from TRM instead of using BIT() macro in the code. Fixes: deca6cfbf5d7 ("imx8mn: set BYPASS ID SWAP to avoid AXI bus errors") Fixes: a07c7181296f ("imx8mp: set BYPASS ID SWAP to avoid AXI bus errors") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/ddr/fsl/mpc85xx_ddr_gen1.c')
0 files changed, 0 insertions, 0 deletions