diff options
| author | York Sun <york.sun@nxp.com> | 2018-01-29 10:24:08 -0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2018-01-30 09:14:07 -0800 |
| commit | 564e9383e53b567114bd3403246c0759a6d69c50 (patch) | |
| tree | 2350bb47536eac77f3cd4c9f3f866abc345f5516 /drivers/ddr/fsl/options.c | |
| parent | c0c32af0b2f037e3e167c7ac82e7110ebae48fb5 (diff) | |
drivers/ddr/fsl: Add calculation of register control words
DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/ddr/fsl/options.c')
| -rw-r--r-- | drivers/ddr/fsl/options.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index 5158ea20899..85ec48c28e3 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -750,7 +750,9 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, defined(CONFIG_SYS_FSL_DDR4) const struct dynamic_odt *pdodt = odt_unknown; #endif +#if (CONFIG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) ulong ddr_freq; +#endif /* * Extract hwconfig from environment since we have not properly setup @@ -1295,6 +1297,7 @@ done: popts->package_3ds = pdimm->package_3ds; +#if (CONFIG_FSL_SDRAM_TYPE != SDRAM_TYPE_DDR4) ddr_freq = get_ddr_freq(ctrl_num) / 1000000; if (popts->registered_dimm_en) { popts->rcw_override = 1; @@ -1308,6 +1311,7 @@ done: else popts->rcw_2 = 0x00300000; } +#endif fsl_ddr_board_options(popts, pdimm, ctrl_num); |