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| author | Yao Zi <ziyao@disroot.org> | 2025-07-10 03:41:58 +0000 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2025-07-17 14:37:40 +0800 |
| commit | 12b90ea3c2943f807b1a54d578c71839ab475be5 (patch) | |
| tree | ad740c061b90bb93e9d86f7ed5bbf9f5c1327aa2 /drivers/ddr/imx/imx8m/ddrphy_csr.c | |
| parent | 00a3b0eb8e4c6ee96e27759a16cb1f159021f68b (diff) | |
riscv: cpu: th1520: Limit upper RAM boundary to 4 GiB
TH1520 SoC ships DMA peripherals that could only reach the first 32-bit
range of memory, for example, the GMAC controllers. Let's limit the
usable top of RAM below 4GiB to ensure DMA allocations are accessible to
all peripherals.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'drivers/ddr/imx/imx8m/ddrphy_csr.c')
0 files changed, 0 insertions, 0 deletions