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| author | Andre Przywara <andre.przywara@arm.com> | 2022-09-05 16:25:57 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2023-10-22 23:41:51 +0100 |
| commit | ad9dcb50019d3d87aa658079907451a3e371c687 (patch) | |
| tree | 6f2c45a89ceabac10b7abfe3f795ae16507b7d4d /drivers/ddr/imx/imx8ulp/ddr_init.c | |
| parent | 4a9e89a3e390bbff31aec25f9ec6d32e29e355f5 (diff) | |
pinctrl: sunxi: add Allwinner D1 pinctrl description
Apart from using the new pinctrl MMIO register layout, the Allwinner D1
and related SoCs still need to usual set of mux values hardcoded in
U-Boot's pinctrl driver.
Add the values we need so far to this list, so that DM based drivers
will just work without further ado.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers/ddr/imx/imx8ulp/ddr_init.c')
0 files changed, 0 insertions, 0 deletions